Title of Invention

A ZERO VOLTAGE SWITCHING CIRCUIT

Abstract

The present invention provides a zero voltage switching circuit comprising a transformer with primary and secondary windings, a primary MOSFET switch, a forward diode across the secondary winding of transformer, an auxiliary switch and an output inductive-capacitive circuit. The primary MOSFET switch consists of a power MOSFET and a capacitor connected across its drain-source terminals. Primary winding of transformer supplies input to the drain of the primary MOSFET switch. The gate of the primary MOSFET receives input from a PWM controller. After secondary winding of the transformer a forward diode is serially connected. In serial communication with the forward diode is an auxiliary switch which is triggered on by an auxiliary PWM input signal that has ON time same as ON time of the PWM signal of the primary MOSFET and with OFF time provided with a delay period. An inductive-capacitive circuit is placed in series with the auxiliary switch across which output voltage is measured.

Full Text

A ZERO VOLTAGE SWITCHING CIRCUIT Technical field The zero voltage switching circuit of the present invention provides zero voltage switching of the primary power switch. The zero voltage switching circuit of the present invention particularly relates to a switching circuit with an auxiliary or secondary switching unit. The zero voltage switching circuit more particularly relates to a switching circuit that achieves true zero voltage switching in a forward converter, designed with a resonant reset scheme. Background and prior art Buck derived forward converters are the most popular switching regulators in the practical DC- DC power conversion. With increased demand for higher power densities and larger power consumptions, soft switching or zero voltage switching or zero current switching has become mandatory. Various techniques are in vogue for implementing soft switching- Active clamp is one such technique in forward converters. However, a few limitations exist in such methods, concerning increased primary currents, erosion of effective duty cycle, etc. if one has to achieve a true zero voltage switching in forward converter. This is due to the fact that the magnetizing primary current gets diverted to secondary, once the main MOSFET switch drain voltage reaches input voltage during the off period. Forward converters are very commonly employed in the industry up to the output power levels of about 1000 watts. Good understanding of the dynamics of this mode coupled with simplicity and low output ripple factors and relatively lower stresses on the semiconductor devices are a few key factors for the popularity of this topology. Also, the easy and variety of control ICs availability has further propelled the usage. A conventional forward converter as depicted in Fig 1 has a single primary power switch (PW) referred to low side and an isolation power transformer to step down the input voltage. Secondary has a diode pack (DP), inductor and filter capacitors to derive the required dc voltage. The power transformers are helpful in transferring the power from one port to another with galvanic isolation and at varied potential levels. They are generally two or multi port devices with one being the input port. Input port is normally excited with alternating current voltage so that the transformer generates time varying alternate flux in the core material and generates the voltages in the secondary ports. Typical B-H curve for the transformer core material is shown in Fig 2. The magnetizing current Im in the primary takes the core in to 1st and 3rd quadrants of the B-H curve alternately and thus induces the voltages in the secondary of the transformer. However it is interesting to note that in the majority of the DC-DC converters, the transformer is excited with a DC voltage as is the case even with Forward converters. Therefore, the magnetizing current Im is only in one direction and the core remains in 1st quadrant only. Hence, it is essential to bring back the operating point to Br value at the beginning of each switching cycle. If not, the operating flux in the transformer progressively builds up in one direction only and ultimately ends up at Bs which is a saturation point and the transformer ceases to function. The mechanism of bringing back the operating point to Br value each time before the start of a new cycle is called the Reset mechanism in forward converters. Generally there are three well known schemes adapted to achieve the transformer Reset in forward converters. They are 1) Using a separate Reset winding on the core 2) R-C-D clamp reset 3) Resonant Reset technique. Reset Winding A forward converter with a separate reset winding P2 is shown in Fig 3. PI is the primary of the transformer, P2 is the reset winding and SI is a secondary winding. Whenever the MOSFET switch Sw is turned ON, the transformer primary sees a constant input voltage and the transformer magnetizing current Im raises linearly. Simultaneously the power is transferred to secondary also. Note that the diode Dl is reverse biased owing to the polarity of the reset winding. When the primary MOSFET switch Sw is turned OFF, due to fly back action the polarities of all the windings reverse and the diode Dl conducts thus clamping the reset winding to input voltage level. The magnetizing current Im gets transferred to P2 and gradually starts decaying. When the complete magnetizing energy is put back in to input, the Im becomes zero and the core is said to be reset at this point of time. Transformer is ready to take another switching cycle. The current and voltage waveforms are shown in Fig 4. Normally the turns ratio between primary and the reset winding is set at 1:1 so that the maximum permissible duty cycle is 50%. It can be clearly seen that core operates only in the 1st quadrant of B-H loop. R-C-D clamp or Resonant Reset Scheme Basically, the operating principle for both the RCD Clamp as well as Resonant Reset schemes is same and hence only the resonant reset scheme is explained since the same is extended in the present invention for achieving zero voltage switching. Resonant reset scheme is a very simple solution in terms of practical implementation since it has no extra components for reset. Further, it exploits the parasitic of the circuit to achieve the reset. The basic schematic of a resonant reset forward converter is shown in Fig 5. When the MOSFET switch, Sw is turned ON, a constant input voltage Vin is impressed across the primary of the power transformer. The magnetizing current Im increases linearly and is governed by A Im= (Vin/Lm) * ton, where ton is the ON time of the switch and Lm is the primary magnetizing inductance. In Fig 5, Ceff is the effective capacitance connected to the drain of the switch Sw which includes the output capacitance of Mosfet Coss, transformer inter winding capacitance and any other capacitances reflected to primary side. When the power switch is turned OFF, the magnetizing current together with the reflected load current flowing in primary starts charging the Ceff. The drain voltage rises linearly to the point of Vin at which point the reflected load current vanishes and the rise of drain voltage will be resonant. The magnetizing energy stored in the Lm is transferred in to Ceff and the drain voltage continues to increase. This will reach a peak value of Vm at which point of time the Im becomes zero. This is the point where in the complete magnetizing energy is transferred to Ceff. From here on, Ceff, which is charged to much higher voltage than the Vin, starts discharging through Lm. This is a resonant transition, with Lm and Ceff being the key resonant elements. The energy in the Ceff is being transferred to the Lm. It is important to note that the direction of lm is reversed now in the Lm and the core is being taken into 3rd quadrant of the B-H curve. Ceff continues to discharge and the drain voltage starts falling in a resonant fashion. When the drain voltage reaches the value of Vin, resonant transition stops because the transformer effectively sees a short circuit (zero voltage across it) and the magnetizing inductance Lm is short circuited. The lm which was a negative entity in the primary side now gets transferred to secondary side. Assuming a continuous conduction mode for the output filter choke, both the diodes conduct in the secondary which effectively carry the Nett of load current and the reflected magnetizing current. This poses a virtual short circuit across the secondary and is in tune with the primary condition. The drain voltage at this point is equal to input voltage. The relevant wave shapes are shown in Fig 6. The lm is negative and is constant till the start of next cycle. The maximum value of drain voltage Vm should be limited to less than the absolute maximum value of the device Vdss max. The simplified resonant equation is obtained by equating the magnetizing energy and the Ceff energy over one switching cycle, i.e Lm*(Vin/Lm*ton/2)t2 =Ceff*Vmt2 As the demand for higher power densities is commanding in the industry, higher switching frequencies are mandatory. However the increase in frequency means higher switching losses in the converters. Therefore the soft switching is adapted in high power density converters. If the converter input voltage is very high typically a 400v DC bus, then ZVS cannot be avoided. Therefore, even though the existing ZVS schemes have one or other limitation, some form of ZVS scheme is chosen depending on the application. US Patent 6,614,288 describes an adaptive drive circuit for controlling the switching behavior of a field effect transistor (FET) or other power switch in a power supply or converter. The circuit includes an adaptive feed-back loop which controls the switching operation of the FET through application of a gate drive signal to the device. The circuit is designed to turn the switching device on or off at the optimum time to reduce the stress and power losses associated with the switching action. The circuit includes a capacitor connected to the FET switch drain to sense the falling voltage across the switch. The adaptive gate drive circuit holds the FET switch off until the drain voltage sensed by the capacitor stops decreasing. At this time, the FET switch voltage is either zero (zero voltage switching) or has reached the minimum value of its resonant ring (low voltage switching). The gate drive circuit then turns the FET switch on, initiating a new cycle of charging up the inductor or primary transformer winding which is a part of the power supply or converter. This invention basically minimizes the switching stress and power loss during the switching cycle. US Patent 6,639,813 describes a zero voltage switching power supply, wherein the power supply has a transformer having a primary winding connected to a pair of AC input terminals through a rectifier circuit and a secondary winding connected to a pair of DC output terminals via a rectifying and smoothing circuit. A primary switch is provided to keep the DC voltage constant. An ancillary switch is connected in parallel with the serial connection of the transformer primary and the primary switch in order to provide a discharge circuit for a soft-switching capacitor connected in parallel with the primary switch. Switching loss is reduced by causing the soft-switching capacitor to discharge before the primary switch is turned on. The US Patent 6,639,813 refers to a zero voltage switching in a power factor correction scheme. The above prior art patents have complicated circuitry and therefore need a lot of hardware implementation. Inspite of this fact real zero voltage switching cannot be guaranteed. None of the above circuits provide real zero voltage switching. Objects of the present invention The primary object of the zero voltage switching circuit of the present invention is to provide a forward converter based zero voltage switching with no loss in duty cycle. An object of the zero voltage circuit of the present invention is to provide zero voltage switching for the power MOSFET in a resonant reset forward converter. An object of the zero voltage switching circuit of the present invention is to achieve true and complete zero voltage switching. Another object of the zero voltage switching circuit of the present invention is to achieve zero voltage switching by means of an auxiliary switch in the secondary side of the circuit. Yet another object of the zero voltage switching circuit of the present invention is to provide zero voltage switching with less amount of power loss. Still another object of the zero voltage switching circuit of the present invention is to achieve one or more of the above objects of the present invention. Summary of the invention The zero voltage switching circuit of the present invention provides zero voltage switching of the primary power switch. The zero voltage switching circuit of the present invention relates to a switching circuit with an auxiliary or secondary switching unit that achieves true zero voltage switching in a forward converter. The present invention provides a zero voltage switching circuit comprising a transformer with primary and secondary windings, a primary MOSFET switch, a forward diode across the secondary winding of transformer, an auxiliary switch and an output inductive-capacitive circuit. The primary MOSFET switch consists of a capacitor connected across the drain-source terminals of primary MOSFET. Primary winding of transformer supplies input to the drain of the primary MOSFET switch. The gate of the primary MOSFET receives input from a PWM controller. After secondary winding of the transformer a forward diode is serially connected. In serial communication with the forward diode is an auxiliary switch which is triggered on by an auxiliary PWM input signal that has ON time same as ON time of the PWM signal of the primary MOSFET and with OFF time provided with a delay period. An inductive-capacitive circuit is placed in series with the auxiliary switch across which output voltage is measured. Brief description of the drawings Fig 1 depicts a conventional forward converter type of switching circuit. Fig 2 depicts the typical B-H curve for the transformer core material. Fig 3 depicts another conventional forward converter with a separate reset winding provided in the transformer. Fig 4 depicts the timing diagram at various stages of working of the conventional forward converter with a separate reset winding shown in Fig 3. Fig 5 depicts the schematic diagram of another conventional resonant reset type of forward converter. Fig 6 depicts the timing diagram at various stages of working of the conventional resonant reset type of forward converter which is shown in Fig 5. Fig 7 depicts the schematic diagram showing a zero voltage switching circuit of the present invention. Fig 8a shows the timing diagram at various stages of working of the zero voltage switching circuit. Fig 8b shows the timing diagram of the PWM modulated input signal of the primary MOSFET switch as well as PWM modulated input signal of the auxiliary MOSFET Switch. Fig 9 shows the practically achieved waveforms of drain voltage along with the input PWM signal. Fig 10 shows the zero voltage circuit of the present invention depicting the auxiliary MOSFET switch open circuited. Fig 11 shows the zero voltage circuit of the present invention depicting the auxiliary MOSFET switch short circuited. Detailed description of the invention. We refer initially to Fig 7, which depicts the schematic diagram showing a zero voltage switching circuit with a secondary side auxiliary switch. The zero voltage switching circuit of the present invention comprises of primary (1) and secondary windings (2) of a transformer, primary MOSFET switch (Q) at the primary windings of the transformer, capacitor (Ceff) across the primary MOSFET switch (Q), a forward diode (3) at the secondary winding of the transformer, an auxiliary switch (4) in series with the forward diode, a diode (5) in parallel, a series inductance (6) and an output capacitance (7). The input to the circuit is provided with a very high DC input voltage source (Vin) which is of a constant voltage level. This circuit is designed to operate for around 400 Volts constant input at the primary winding (1) of the transformer. The drain of a primary MOSFET switch (Q) is connected with one end of the primary winding (1) of the transformer such that the drain voltage will be equivalent to the input voltage available at the primary winding (1) of the transformer when the primary MOSFET switch (Q) is OFF. Across the drain and source of the primary MOSFET (Q), a capacitor (Cefl) is introduced. At the gate of the primary MOSFET (Q), a Pulse width modulated (PWM) input is provided. The turn ON and turn OFF timings of the PWM signal at the gate of the MOSFET (Q) is decided depending on PWM controller based on the output load and input voltage conditions. The frequency of switching is generally in the range of 150 KHz and above. The duty cycle (the ratio of switch ON time to total time period) is directly related to output voltage and the transformer turns ratio and the input voltage. Initially when the primary MOSFET switch (Q) is ON, i.e., during the ON time of the MOSFET (Q), the input voltage is applied across the transformer primary (1). During this ON time of the MOSFET (Q), the magnetizing current in the primary winding (1) increases linearly as depicted in the timing diagram shown in Fig 8a. The magnetizing current is calculated by the equation, Im = (Vin/Lm) * Ton, where Ton is the ON time of the primary MOSFET switch (Q) and Lm is the primary magnetizing inductance of the transformer. The effective capacitance (Ceff) connected to the drain of the MOSFET (Q) includes the output capacitance of the MOSFET, transformer inter-winding capacitance and any other capacitances reflected to the primary side. During the OFF-time of the primary MOSFET switch (Q), the magnetizing current lm, together with the reflected load current flowing in the primary starts charging the Ceff capacitor. The drain voltage rises linearly to the point of Vin, after which the reflected load current disappears and the drain voltage rises further. Now, the magnetizing energy stored in the Lm is being transferred to the Ceff and the drain voltage continues to increase. This increase in the drain voltage occurs in the OFF time of the MOSFET (Q) in a resonant fashion .The drain voltage attains a peak voltage Vm. At this peak value Vm of the drain voltage, the magnetizing current lm becomes zero. This is considered to be the point at which the complete magnetizing energy is transferred to the capacitor Ceff. Now, at this point of time, the capacitor Ceff is charged to a much higher voltage level than the input voltage Vin. From now on in the time sequence, the capacitor starts discharging through primary magnetizing inductance, Lm (During this entire interval the Mosfet Switch is OFF). This is the resonant transition, wherein the Lm and Ceff are the key elements. The energy available in the capacitor Ceff is transferred to the inductance Lm. During the ON period of the MOSFET (Q), the magnetizing current passes in one direction and the current increases. However, during the discharging phase, the direction of the magnetizing current is reversed in the Lm. The capacitor Ceff continues to discharge during the OFF time and the drain voltage starts falling in a resonant manner. At the secondary of the zero voltage switching circuit of the present invention an auxiliary switch (4) is serially connected to a forward diode (3) as shown in Fig 7. In case the secondary auxiliary switch (4) is not present, then while the Ceff is discharging and the drain voltage reaches the value of the input voltage Vin, the resonant transition will stop because the transformer effectively sees a short circuit (i.e., a zero voltage across it) and the magnetizing inductance Lm will be short-circuited. The magnetizing current from the primary coil (1) of the transformer will be transferred to the secondary coil (2) of the transformer since a path is available for the current to travel. At the secondary coil (2) of the transformer the rectifier diodes conduct (both of them simultaneously assuming the continuous conduction mode for the output filter inductor). This will pose a virtual short circuit across the secondary (2) of the transformer. The drain voltage at this point will be equal to the input voltage. The magnetizing current will be negative and will be constant till the start of the next cycle of the PWM. However, it is necessary to mainly decrease the drain voltage to zero volts. This can be achieved, if the escape of the magnetizing current into the secondary coil (2) of the transformer is effectively prevented. In case, the escape of the magnetizing current into the secondary coil is prevented, then there will be energy available for reducing the drain voltage further. In the present invention, the escape of magnetizing current into the secondary winding (2) is prevented by using an auxiliary switch (4) at the secondary (2) of the transformer. The auxiliary switch (4) that is used may be any type of auxiliary switch (4) which is controlled by the same PWM input as that of primary MOSFET switch (Q). In the present invention a secondary MOSFET type of auxiliary switch (4) is used. However, this should not be construed to limit the scope of the invention. It is also within the purview of the invention to have other types of auxiliary switches, which are controlled by means of PWM input. In the secondary MOSFET type of auxiliary switch, the switch consists of a MOSFET (4a). The gate of the MOSFET is provided with an external PWM input signal. The operation of the auxiliary MOSFET switch is controlled by means of PWM input. The timing diagram of the PWM modulated input signal of the primary MOSFET switch as well as PWM modulated input signal of the auxiliary MOSFET Switch is shown in Fig 8b. The ON and OFF time of the PWM input of the auxiliary switch (4) is same as the ON and OFF time of the PWM input of the primary MOSFET switch (Q), the only difference being that the auxiliary switch (4) is triggered OFF after a certain delay time as compared to that of the primary MOSFET switch (Q). The amount of delay time is equivalent to the reverse recovery time of the diode (3) which is provided in series with the auxiliary switch (4). The working of the zero voltage switching circuit of the present invention is depicted in Figs 10 and 11. Fig 10 shows the zero voltage circuit of the present invention depicting the auxiliary MOSFET switch open circuited and Fig 11 shows the zero voltage circuit of the present invention depicting the auxiliary MOSFET switch short circuited. During the time when the primary MOSFET switch (Q) is OFF, then the secondary MOSFET switch (4) is also OFF, thereby ensuring that the transformer secondary (2) is virtually open circuited. Therefore, during discharging when the drain voltage reaches input voltage, there will be no passage available for the magnetizing current to travel from the primary winding (1) to the secondary winding (2) of the transformer, since the secondary winding (2) is effectively open circuited. Therefore, the energy stored in the capacitor Ceff is completely transferred to the magnetizing inductance and thereby the Ceff voltage reaches zero. This ensures that the drain voltage becomes trully zero when the Ceff is completely discharged. Similarly, during the time when the primary MOSFET switch (Q) is ON, then the secondary auxiliary switch (4) is also ON, thereby ensuring that the transformer secondary (2) is short-circuited. Thus when the auxiliary switch (4) is ON, then it acts as a short circuit and does not affect the normal operation of the Forward converter. We refer again to Fig 8b, wherein the timing diagram of the PWM modulated input signal of the primary MOSFET switch (Q) as well as PWM modulated input signal of the auxiliary Switch (4). The turn OFF time of the auxiliary switch (4) is delayed by certain duration of time even after the turn OFF of the primary MOSFET switch (Q). The delay is provided during the switch OFF of the auxiliary switch (4) as compared the operation of the primary MOSFET switch (Q). This delay period that is provided is approximately equal to the reverse recovery time of the diode (3) provided in series in the secondary winding (2) of the transformer. During the OFF time the series diode (3) anyway is going to block the reverse current after a finite recovery time. In such conditions if the auxiliary switch is turned OFF, then it turns OFF with zero current. This avoids all the turn OFF losses in the auxiliary switch (4). Power factor correction is a boost regulator with a typical output of 400V DC, which is fairly regulated. In such cases the down stream forward converter can be effectively optimized and the transformer can be designed to meet the requisite magnetizing inductance values to facilitate a true zero voltage switch ON. Also this facilitates the addition of an extra capacitor across the primary MOSFET drain and source. The addition of this capacitor would help in achieving zero voltage switching during the OFF time also of the primary switch. This virtually eliminates all the switching losses and improves the efficiency, reliability and reduces the Electromagnetic Interference (EMI). A practical converter operating at 250 KHz and delivering 240 watts power is built with the above scheme and the achieved performance and the waveforms are shown in Fig 9. Advantages 1. The present invention provides a zero voltage switching circuit which ensures no loss of duty cycle during the switching. 2. The zero voltage switching circuit of the present invention is effective in cases where the input voltage is very high. 3. The zero voltage switching circuit of the present invention eliminates the switching losses. 4. The zero voltage switching circuit of the present invention improves the efficiency, reliability and reduces the electromagnetic interference effect. 5. The invention is very simple to implement and needs minimal hardware. We claim 1. A zero voltage switching circuit, said zero voltage switching circuit comprising; a transformer with primary and secondary windings, a primary MOSFET switch consisting of a capacitor connected across the drain-source terminals of a primary MOSFET, said primary MOSFET switch placed serially with the primary winding of the transformer, said transformer primary winding to receive input from an input DC voltage source, said primary MOSFET switch to receive voltage from the primary winding of the transformer, said primary MOSFET to receive Pulse Width Modulated gate input from a PWM (Pulse Width Modulation) controller, a forward diode serially connected to the secondary winding of the transformer, an auxiliary switch placed in serial communication with the forward diode, said auxiliary switch triggered on by an auxiliary PWM input signal, an inductive-capacitive circuit placed in series with the auxiliary switch and the output voltage measured across the capacitor of said inductive-capacitive circuit. 2. The zero voltage switching circuit as claimed in claim 1, wherein the input DC voltage supplied to the primary transformer winding is in the range of 300 to 400 Volts. 3. The zero voltage switching circuit as claimed in claim 1, wherein the ON time of the auxiliary PWM input signal supplied to the gate of the auxiliary MOSFET is exactly same as the ON time of the PWM input at the gate of the primary MOSFET. 4. The zero voltage switching circuit as claimed in claim 1, wherein the OFF time of the auxiliary PWM input signal applied to the auxiliary MOSFET is delayed by a certain time period as compared to the OFF time of the primary gate PWM input. 5. The zero voltage switching circuit as claimed in claim 4, wherein the delay time period is selected to be equal to the reverse recovery time of the serially connected forward diode. 6. The zero voltage switching circuit as claimed in claim 1, wherein the auxiliary switch may be selected from MOSFET whose gate is provided with a PWM input or any

Documents:

0977-che-2005-abstract.pdf

0977-che-2005-claims.pdf

0977-che-2005-correspondnece-others.pdf

0977-che-2005-description(complete).pdf

0977-che-2005-drawings.pdf

0977-che-2005-form 1.pdf

0977-che-2005-form 26.pdf

0977-che-2005-form 3.pdf

0977-che-2005-form 5.pdf

977-che-2005 claims.pdf

977-che-2005 correspondance others.pdf

977-che-2005 form-3.pdf

977-che-2005 form-5.pdf

977-che-2005 others.pdf

EXAMINATION REPORT REPLY.PDF