Title of Invention

A METHOD FOR PRODUCING AN OXYNITRIDE LAYER

Abstract A method for producing thin, below 6nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-based material. Second, the nitrogen incorporation is followed by an oxidation step. The method yields excellent thickness control of high quality gate dielectrics for Ge-based field effect devices, such as MOS transistors. Structures of devices having the thin germanium oxynitride gate dielectric and processors made with such devices are disclosed, as well.
Full Text

Description THE PRODUCTION OF A GERMANIUM OXYNITRIDE LAYER
ON A GE-BASED MATERIAL Technical Field
[001] The present invention relates to electronic devices and systems. In particular it
relates to a method of producing a germanium oxynitride layer on a Ge-based material (e.g. for use as a thin gate dielectric).
Background Art
[002] Today's integrated circuits include a vast number of devices. Smaller devices are key to enhance performance and to improve reliability. As MOS (Metal Oxide Semiconductor Field-Effect-Transistor, a name with historic connotations meaning in general an insulated gate Field-Effect-Transistor) devices are being scaled down, the technology becomes more complex and new methods are needed to maintain the expected performance enhancement from one generation of devices to the next. Disclosure of Invention
[003] Gate dielectrics is one of the main problems for MOS field effect device scaling. This is true for both conventional silicon devices and more advanced (e»g. SiGe, Ge) devices.
[004] In Ge-based devices, the situation is quite complicated. The term "Ge-based"
typically refers to SiGe compounds, where the Ge concentration is over about 30-40%. The term Ge-based also includes an essentially pure Ge material. So far no reliable high- quality gate dielectric has been found for Ge based materials. Germanium oxide is of poor quality and is soluble in water. Binary metal oxides (e.g. ZrO , HfO ) show
2 2
~ 40% electron mobility degradation when used as gate dielectrics. Germanium oxynitride quality and scaling potential up to now was thought to be inferior to the SiO /Si system.
[005] Ge-based devices are a higher-performance alternative to conventional Si-based devices due to their better carrier mobility, especially for holes. Of all gate insulators on Ge substrates explored and reported so far, germanium oxynitride shows best potential performance. However, the rate of thermal oxidation/oxynitridation of Ge is much faster than that of Si. This makes it difficult to grow thin germanium oxynitride films with good process control, and/or with an equivalent oxide thickness (EOT) of below about 6nm. (Since the quintessential gate dielectric material is SiO , this material provides the standard for comparison. Since the dielectric constant of germanium oxynitride [about 6 to 9] differs form that of SiO , the meaningful value as
2
far as thickness is concerned is an equivalent thickness in SiO . This equivalence
2

refers to capacitance, meaning the thickness of such an SiO layer which has the same capacitance per unit area as the germanium oxynitcide layer.)
[006] According to a first aspect, there is provided a method for producing a germanium oxynitride layer on a Ge-based material, comprising the steps of: incorporating a first concentration of nitrogen into a surface layer underneath a first surface of the Ge-based material; and inducing growth of the oxynitride layer by exposing the first surface of the Ge-based material to an oxygen containing ambient, wherein the first concentration of nitrogen in the surface layer is controlling the growth of the oxynitride layer. [007] Preferably the produced oxynitride layer has less than about 6nm of equivalent
oxide thickness (EOT).
[008] Preferably the produced oxynitride layer has between 0.5nm and 5nm of EOT. [009] Preferably the Ge-based material consists essentially of Ge. [010] In one embodiment the incorporation of the first concentration of nitrogen is carried out by subjecting the first surface to a nitrogen containing gas under thermal conditions.
[011] Preferably the nitrogen containing gas is NH . [012] Preferably the thermal conditions are selected to be a temperature between 450°C
and 700°C applied for between 1 second and 300 seconds. [013] In one embodiment the incorporation of the first concentration of nitrogen is carried
out by ion implanting a nitrogen dose into the first surface. [014] Preferably the ion implantation of the nitrogen dose is selected to be between about
lE15percm and 2E16 per cm . [015] Preferably in the step of ion implanting an implantation energy is selected to be
between 0.5KeV and lOkeV. [016] In a preferred embodiment the step of ion implanting is carried out through a screen
layer. [017] In one embodiment the step of incorporating the first concentration of nitrogen is
carried out by subjecting the first surface to a nitrogen containing plasma. [018] Preferably the nitrogen containing plasma is being applied with a power of between about 25W and 1000W, at a temperature of between about room temperature and 500&C, and for a time of between about lsec and 300sec.
[019] In a preferred embodiment an integrated value of the first concentration of incorporated nitrogen is between about 1E14 per cm2and 3E15 per cm . [020] In one embodiment the exposing to the oxygen containing ambient is carried out by subjecting the first surface under thermal conditions to species selected from the group consisting of O , O ,H O,NO,N O, and combinations of these species thereof. [021] Preferably the thermal conditions are selected to be a temperature between 500°C and 700°C applied for between 1 minute and 30 minutes.

[022] In one embodiment the exposing to the oxygen containing ambient is carried out by subjecting the first surface to an oxygen containing plasma.
[023] Preferably the oxygen containing plasma is being applied with a power of between about 25W and 1000W, at a temperature of between about room temperature and 500° C, and for a time of between about lsec and 300sec.
[024] In a preferred embodiment, the first surface is cleaned before the first concentration of nitrogen is incorporated. In this embodiment the cleaning comprises at least one application of an oxidation and oxide removal cycle, wherein the oxidation is accomplished with an H 0 containing solutions, and the oxide removal is accomplished
2 2
by a stripping agent, wherein the stripping agent is HF, HC1, or their mixture thereof.
[025] In a preferred embodiment the first surface is having at least two locations, and wherein the step of incorporating the first concentration of nitrogen is carried out on the at least two locations in a manner to yield differing first concentrations of the incorporated nitrogen, whereby the produced germanium oxynitride layers on the least two locations have differing EOT.
[026] A solution is provided in accordance with a preferred embodiment of the present invention, for the problem of growing a thin germanium oxynitride layer in a controlled manner. The solution involves using a two step process. The first step being incorporating a first concentration of nitrogen into a surface layer underneath a first surface of the Ge-based material. This nitrogen-rich region preferably acts as a diffusion/reaction barrier that controls the germanium oxidation/oxynitridation rate in a second, oxidation step. Such a control preferably allows one to grow ultrathin germanium oxynitrides in a governable, reproducible manner. The thin germanium oxynitride gate dielectric preferably allows for improved properties and higher performance in Ge-based field effect devices.
[027] The method of the present invention preferably offers two independent controls of the dielectric formation, firstly, the initial step preferably defines nitrogen incorporation into the surface/subsurface region of Ge-base material substrate, and hence its diffusion barrier "power", and dielectric constant. Secondly, the subsequent oxidation step preferably controls final thickness of the germanium oxynitride film.
[028] In accordance with a preferred embodiment, there is taugjit a method of producing a thin, below 6nm, preferably below 5nm of EOT, good quality germanium oxynitride insulator layers on Ge-based materials.
[029] In accordance with a preferred embodiment, there is taught a method for fabricating Ge-based field effect devices which contain the good quality germanium oxynitride insulator layers as gate dielectrics.
[030] In accordance with a preferred embodiment of the present invention, there is taught processors which comprise chips containing such a Ge-based field effect device having

preferably below 6nm of EOT, good quality germanium oxynitride gate insulator layers on Ge-based materials.
[031] According to another aspect, there is provided a method for fabricating a high
performance Ge-based field effect device, wherein the device comprising a germanium oxynitride gate dielectric, and production of the germanium oxynitride gate dielectric is comprising the steps of: incorporating a first concentration of nitrogen into a surface layer underneath a first surface of the Ge-based material; and inducing growth of the oxynitride layer by exposing the first surface of the Ge-based material to an oxygen containing ambient; wherein the first concentration of nitrogen in the surface layer is controlling the growth of the oxynitride layer.
[032] Preferably the high performance Ge-based field effect device is a Ge MOS transistor.
[033] Preferably the germanium oxynitride gate dielectric has between 0.5nm and 5nm of EOT.
[034] According to another aspect, there is provided a Ge-based field effect device, comprising: a germanium oxynitride gate dielectric with less than 6nm of EOT.
[035] Preferably the germanium oxynitride gate dielectric has between 0.5nm and 5nm of EOT.
[036] In a preferred embodiment the germanium oxynitride gate dielectric possesses
greater resistance against charge tunneling than a SiO gate dielectric, meanwhile a ca-
z
pacitance per unit area of the germanium oxynitride gate dielectric is at least as large
as the capacitance per unit area of the SiO gate dielectric. [037] In a preferred embodiment the device is a Ge MOS transistor. [038] According to another aspect, there is provided a high performance processor,
comprising: at least one chip, wherein the chip comprises at least one Ge-based field
effect device, and wherein the device comprising a germanium oxynitride gate
dielectric with less than 6nm of EOT. [039] Preferably the processor is a digital processor. [040] In a preferred embodiment the processor comprises at least one analog circuit.
Brief Description of the Drawings
[041] Preferred embodiments of the present invention will now be described, by way of example only, and with reference to the following drawings:
[042] Fig. 1 shows nitrogen incorporation steps of the method in representative embodiments;
[043] Fig. 2 shows, in accordance with a preferred embodiment, a plot of nitrogen incorporation vs. thermal conditions in the execution of the nitrogen incorporation step;
[044] Fig. 3 shows, in accordance with a preferred embodiment of the present invention,

the oxidation step completing the production of a thin germanium oxynitride layer;
[045] Fig. 4 shows, in accordance with a preferred embodiment of the present invention, plots of the thickness and EOT of the thin germanium oxynitride layer vs the conditions of the oxygen ambient exposure step;
[046] Fig. 5 shows, in accordance with a preferred embodiment of the present invention, a schematic cross sectional view of a Ge-based field effect device having a thin germanium oxynitride gate dielectric; and
[047] Fig. 6 shows, in accordance with a preferred embodiment of the present invention, a symbolic view of a high performance processor containing at least one chip which contains a Ge-based field effect device having a thin germanium oxynitride gate dielectric. Mode for the Invention
[048] In the fabrication of high performance Ge-based field effect devices the processing steps that preceded the production of the gate dielectric are known in the art. These steps, such as device isolation, dopant well formation, etc., are assumed to have been completed before commencing the steps of the preferred embodiment. However, before the disclosed method steps can take place to produce a thin germanium oxynitride layer, a surface, referred to as a first surface, of the Ge based material, generally a wafer, the one which will be the recipient of the gate dielectric, has to be properly cleaned. In a representative embodiment such cleaning steps can include, but are not limited to, at least one cycle of oxidation and germanium oxide removal. The oxidation is preferably performed in H 0 solutions, while oxide removal is ac-
2 2
complished by HF, or HC1, or their mixtures. After the cleaning step the first surface of the Ge based material, which is host to the devices, is ready for a step by which a first concentration of nitrogen will become incorporated into a surface layer underneath the first surface.
[049] Fig. 1 shows a nitrogen incorporation steps of the method in representative embodiments. Fig. 1A shows an embodiment wherein the nitrogen incorporation is carried out by subjecting the first surface 5 of the Ge-based body 160, typically the surface of a Ge-based material wafer, to a nitrogen containing gas under thermal, or plasma conditions. The reactive nitrogen containing gas in a representative embodiment is NH . In alternate embodiments this nitrogen containing reagent may also be NO or N O, In further alternate embodiments one can use various com-
2
binations of the gases NH NO, or N O. All of these species can be sources of atomic
3> 2
nitrogen under the proper circumstances. In each case these active components can be mixed in with inert components, or carrier gases, such as N , Ar, He, etc.. [050] The thermal conditions for this chemical nitrogen incorporation step can be between

450&C and 700&C applied for between 1 second and 300 seconds. The temperature typically is applied by rapid thermal annealing techniques, well known in the art. Conditions for this step in a representative embodiment can be: NH active gas at 600&C for 30 seconds. Depending on the conditions, the resulting nitridated thin layer 90 characteristically is between about 0.5nm and 1,5nm thick. This layer 90 incorporates a first concentration of nitrogen, which first concentration has an integrated value giving a surface density of incorporated nitrogen between about 1E14 per cm and 3E15 per cm . [051] The nitrogen incorporation step can also be performed by the use of plasma ni-
tridation. In this case, a first surface of the Ge-based surface is exposed to a low energy nitrogen containing plasma. It can be done in a direct plasma mode or by remote (downstream) plasma nitridation. Plasma power can be varied in the about 25 W -1000W range, exposure preferably is between lsec and 300 sec. The sample temperature during plasma exposure is preferred to be from about room temperature to 500SC.N , NH andN O gates can be used in plasma reactors as N source.
2 3 2
[052] Fig. IB schematically shows the step of nitrogen incorporation when this step is carried out by ion implanting 70 a nitrogen dose into the first surface 5 on the Ge-based material body 160. The implantation energy should be low, typically between 0.5KeV and lOkeV. In this manner the N ends up located close to the first surface 5 in a layer 90. Alternatively, instead of using such low implant energy, but to assure that the N will be in the thin layer 90, the ion implantation can be performed through a thin, lOnm to 30nm, screen layer. Such screening techniques are known in the art. The screen layer in an exemplary embodiment being, for instance, deposited SiO , which after the implantation can be chemically removed. The implant dose of N can typically be between about 1E15 per cm and 2E16 per cm .
[053] Fig. 2 shows, in accordance with a preferred embodiment of the present invention, a plot of characteristic nitrogen incorporation vs. thermal conditions in the execution of the N incorporation step, as the concentration is being measured by nuclear reaction analysis. On the vertical axis the integrated concentration in the layer 90 is shown against the temperature of reaction when NH was the reagent gas, during a 30 sec exposure.
[054] Independently, whether the nitrogen incorporation step is carried out by subjecting the first surface 5 to a nitrogen containing gas under thermal conditions or plasma conditions, or by N ion implantation, the amount of nitrogen, introduced in the nitrogen incorporation step governs the oxidation rate during the next, the oxidation step. With the trend of moie nitrogen providing more slow reoxidation kinetics, and therefore thinner films.
[055] Fig. 3, in accordance with a preferred embodiment of the present invention, shows

the oxidation step which completes the production of the thin a germanium oxynitride layer. This is a second step in the preferred embodiment, when the nitrogen containing layer controls the oxidation rate of the Ge-based material 160 as the first surface 5 is exposed to an oxygen ambient under thermal, or plasma conditions. The thin surface layer incorporating nitrogen 90 is regulating production of the oxynitride layer 100, while layer 90 itself is also transformed into the oxynitride layer 100. [056] The oxygen ambient in a representative embodiment contains as reactive species O ,O ,H O,NO,N O since they can be sources of atomic oxygen. Combinations of
3 2 2
these gases can also be used. Typically the reactive gases can be mixed in with inert components, such as N2, Ar, He, etc.. That the oxidation step can also be performed in nitrogen containing gases, such as, N Os NO is due to the fact that they tend to decompose at high-temperatures releasing atomic oxygen. Similarly, oxidation can be carried out by wet oxidation using H2O vapor mixed in a carrier inert gas. The thermal ambient in this step is typically a temperature between 500aC and 700aC, applied for between 1 minute and 30 minutes. After finishing with the oxygen exposure step the germanium oxynitride layer is ready as the gate dielectric, and one can proceed with further processing of devices in a standard manner.
[057] The oxidation step can also be performed by the use of plasma oxidation. In this
case, the first surface S with the nitrogen containing layer 90 underneath is exposed to a low energy oxygen containing plasma. This can be done in a direct plasma mode or by remote (downstream) plasma oxidation. Plasma power can be varied in the about 25W - 1000W range, exposure preferably is between lsec and 300 sec. The sample temperature during plasma exposure is preferred to be from about room temperature to 500S.C. The same oxygen containing species can be used as with the thermal oxidation,
[058] Fig, 4 shows plots of the thickness and of the EOT of the thin germanium
oxynitride layer 100 vs the conditions of the oxygen ambient exposing step, when the nitrogen incorporation step involved NH exposure at 600aC for 5 minutes. Since the quintessential gate dielectric material is SiO this material provides the standard
2
comparison. Since the dielectric constant of germanium oxynitride differs form that of SiO , it is useful to not only give the thickness of the thin germanium oxynitride layer
2
100, but also give equivalent thickness in SiO . The equivalence means the thickness
2
of such an SiO layer which has the same capacitance per unit area. Thus in Fig. 4 the z
EOT values are the results of standard capacitance versus voltage measurements. Fig. 4 shows how sensitively the thickness of the germanium oxynitride can be controlled, and that the EOT of the germanium oxynitride layer is tuned even in the unprecedented, below 5nm range, by controlling the thermal budget during the oxygen exposure step. [059] This invention, in accordance with a preferred embodiment, can thus produce

germanium oxynitride layers that have less than about lOnm of EOT. A preferred range of germanium oxynitride gate dielectric for high performance devices is below 6nm of EOT, preferably having a range between 0.5nm and 5nm of EOT.
[060] When the Ge-based material is actually essentially pure Ge, the invention (in accordance with a preferred embodiment) is particularly significant, since pure Ge devices can potentially deliver the best performance*
[061] It is emphasized that the present method offers an additional process flexibility, namely to grow multiple, for example dual, oxynitride dielectric thicknesses for different devices/applications on the same wafer by incorporating different amounts of nitrogen in differing parts of the wafer. The first surface 5, would have at least two differing locations, where the nitrogen incorporation step is carried out in manners to yield differing first concentrations of the incorporated nitrogen. Accordingly, the produced, final oxynitride layers on the at least two locations end up having differing EOT.
[062] Fig. 5 shows a schematic cross sectional view of a Ge-based field effect device 10 having a thin germanium oxynitride layer 100 gate dielectric, preferably having an equivalent oxide thickness of less than 5nm. The gate dielectric germanium oxynitride 100 is an insulator, separating a conductive gate 110 from a Ge-based body 160.
[063] Germanium oxynitride, in general, has a high dielectric constant, which means over approximately 4, which can result in germanium oxynitride having a high barrier, namely exhibiting high resistance, against charge tunneling. As the thickness of gate dielectrics is decreasing in order to increase the gate-to-channel capacitance, resistance against charge tunneling across the gate dielectric is an important issue. The standard gate dielectric material SiO (dielectric constant of 3.9), does have such problems.
2
Since the dielectric constant of germanium oxynitride is larger than that of SiO , a germanium oxynitride layer which has the same capacitance per unit area as a SiO
2
layer is thicker than the SiO layer. Since resistance against tunneling depends expo-nentially on layer thickness, the germanium oxynitride layer will tend to be the more charge penetration resistant.
[064] Fig. 5 depicting a Ge-based, or in a representative embodiment pure Ge, field effect device is almost symbolic, in that it is meant to represent any kind of field effect device. The only common denominator of such devices is that the device current is controlled by a gate 110 acting by its field across an insulator, the so called gate dielectric 100. Accordingly, every field effect device has a (at least one) gate, and a gate insulator.
[065] Fig. 5 depicts schematically an MOS field effect device, with the source/drain
regions 150, device body 160. The body, can be bulk, as shown on Fig. 5, or it can be a thin film on an insulator. The channel can be a single one, or multiple one, as on

double gated, or FINFET devices. The basic material of the device can be of a wide variety. The body can be a Ge compound, or consisting of essentially pure Ge.
[066] In a representative embodiment the Ge-based field effect device is a Ge MOS. In a further representative embodiment the Ge-based field effect device has a germanium oxynitride layer gate dielectric which preferably has an EOT range between 0.5nm and 5nm.
[067] Fig. 6 shows a symbolic view of a high performance processor 900 containing at least one chip 901 which contains a Ge-based field effect device 10 having a thin germanium oxynitride gate dielectric, which has an EOT of less than 5am. The processor 900 can be any processor which can benefit from the germanium oxynitride gate dielectric Ge-based field effect device. These devices can form part of the processor in their multitude on one or more chips 901. Representative embodiments of processors manufactured with the thin germanium oxynitride gate dielectric Ge-based field effect devices are digital processors, typically found in the central processing complex of computers; mixed digital/analog processors, which benefit significantly from the high mobility of the carriers in the germanium oxynitride gate dielectric field effect devices; and in general any communication processor, such as modules connecting memories to processors, routers, radar systems, high performance video-telephony, game modules, and others.
[068] Many modifications and variations of the present invention are possible in light of the above teachings, and could be apparent for those skilled in the art. The scope of the invention is defined by die appended claims.

AMENDED CLAIM SET:
1 J, 30. (uanettled)"""
1 ' yC. (new) A method for producing an oxynitride layer, the method comprising:
2 providing a wafer of Ge-based material, the Ge-based material having a first
3 surface; and
1 carrying out a two step process consisting of a first step followed by a second step,
2 wherein the first step consists of incorporating underneath the first surface a first
3 concentration of nitrogen having a surface density of between about 1E14 per cm2 and
4 3E15 per cm2, and wherein the second step consists of exposing the first surface to an
5 oxygen containing ambient, thereby oxidizing the Ge-based material and growing the
6 oxynitride layer, wherein the first concentration is so chosen as to govern the oxidizing
7 rate during the second step, wherein the produced oxynitride layer is controlled to be
8 between O.Sran and 5nm of equivalent oxide thickness (EOT).
1 v ^(new) The method of claim 31, wherein the Ge-based material consists essentially of
2 Ge,
! / /$$. (new) The method of claim 31. wherein the first step is carried out by subjecting the
2 first surface to a nitrogen containing gas under thermal conditions.
Serial No.: 10/672,631; Docket No YOR920030463US1

1 \ 34; (new) The method of claim 33, wherein the nitrogen containing gas is MI3, and the
2 thermal conditions are selected to be between 45()GC and 700°C applied for between 1
3 second and 300 seconds.
1 ^ )o. (new) The method of claim 31. wherein the first step is carried out by ion implanting
2 a nitrogen dose into the firsi surface.
1 ^o od. (new) The method of claim 35, wherein the nitrogen dose is selected to be between
2 about I El 5 per cm2 and 2E16 per cm2 with an implantation energy of between about
3 O.SKeVandlOkeV.
1 rv^^v. (new) The method of claim 36. wherein the ion implanting is carried out through a
2 screen layer.
1 2 first surface to a nitrogen containing plasma applied with a power of between about 25W
3 and 1000W, at a temperature of between about room temperature and 500°C\ and for a
4 time of between about 1 sec and 300sec.
1 °\ {39. (new) The method of claim 31, wherein the second step is carried OUT by subjecting
2 the first surface under thermal conditions to species selected from the group consisting of
Serial No: 10/672,631; Docket No.: YOR920030463US1

1 02? 03s H20, NO. N/). and combinations of these species thereof.
1 \P >*0. (new) The method of claim 39, wherein the thermal conditions are selected to be
2 between 500°C and 700cC applied for between 1 minute and 30 minutes.
1 v^\ ^1. (new) The method of claim 3L wherein the second step is carried out by subjecting
2 the first surface to an oxygen containing plasma applied with a power of between about
3 25 W and 1000W. at a temperature of between about room temperature and 500°C. and
4 for a time of between about lsec and 300sec.
1 \V^2. (new) The method of claim 31, wherein the method further comprises cleaning the
2 first surface before the first step, wherein the cleaning comprises ai least one application
3 of an oxidation and oxide removal cycle, wherein the oxidation is accomplished with an
4 H2O2 containing solutions, and the oxide removal is accomplished by a stripping agent
5 wherein the stripping agent is HF, HCI. or their mixture thereof.
1 \7 flil, (new) The method of claim 31, wherein the first surface is having at least two
2 locations, and wTherein the first step is carried out on the at least two locations in a manner
3 to yield differing first concentrations, whereby the produced oxynitride layers on the least
4 two locations have differing l;OT.
Serial No.: 10/672,631; Docket No : YOR920030453US1

1 ^ ^.44. (new) A method for fabricating a high performance Ge-based field effect device,
2 wherein the device comprising a oxynitride layer gate dielectric, and production of the
3 oxynitride layer is comprising:
4 providing a wafer of Ge-based material, the Ge-based material having a first
5 surface; and
6 earning out a two step process consisting of a first step followed by a second step,
7 wherein the first step consists of incorporating underneath the first surface a first
8 concentration of nitrogen having a surface density of between about 11-14 per cm2 and
9 3E15 per cm2, and wherein the second step consists of exposing the first surface to an

10 oxygen containing ambient, thereby oxidizing the Ge-based material and growing the
11 oxynitride layer, wherein the first concentration is so chosen as io govern the oxidizing
12 rate during the second step, wherein the produced oxynitride layer is controlled to be
13 between 0.5nm and 5nm of equivalent oxide thickness (EOT).
1 v^ &5. (new) The method for fabricating of claim 44, wherein the high performance Ge-
2 based field effect device is a Ge MOS transistor.
1 V r6- (new) A method for producing a germanium oxynitride layer, the method comprising:
2 providing a wafer, the wafer having a Ge surface: and
3 carrying out a two step process consisting of a first step followed by a second step,
4 wherein the first step consists of incorporating underneath the Ge surface a first
Serial No.: 10/672,631; Docket No.; YOR920030463US1

1 concentration of nitrogen having a surface density of between about i I;.14 per cm2 and
2 3E15 per cm2, and wherein the second slep consists of exposing the Ge surface to an
3 oxygen containing ambient, thereby oxidizing the Ge and growing the germanium
4 oxynitride layer, wherein the first concentration is so chosen as to govern the oxidizing
5 rate during the second step, wherein the produced germanium oxynitride layer is
6 controlled to be between 0.5nm and 5nm of equivalent oxide thickness (HOT).


Documents:

1437-chenp-2006 assignment-09-07-2009.pdf

1437-chenp-2006 correspondence others-09-07-2009.pdf

1437-chenp-2006 petition-09-07-2009.pdf

1437-chenp-2006-abstract.pdf

1437-chenp-2006-claims.pdf

1437-chenp-2006-correspondnece-others.pdf

1437-chenp-2006-description(complete).pdf

1437-chenp-2006-drawings.pdf

1437-chenp-2006-form 1.pdf

1437-chenp-2006-form 26.pdf

1437-chenp-2006-form 3.pdf

1437-chenp-2006-form 5.pdf

1437-chenp-2006-pct.pdf

EXAMINATION REPORT REPLY.PDF


Patent Number 241666
Indian Patent Application Number 1437/CHENP/2006
PG Journal Number 30/2010
Publication Date 23-Jul-2010
Grant Date 19-Jul-2010
Date of Filing 27-Apr-2006
Name of Patentee INTERNATIONAL BUSINESS MACHINES CORPORATION
Applicant Address New Orchard Road, Armonk, New York 10504
Inventors:
# Inventor's Name Inventor's Address
1 GOUSEV, Evgeni 10 Raven Road, Mahopac, New York 10541
2 SHANG, Huiling 1870 Baldwin Road, Yorktown Heights, New York 10598
3 D'EMIC, Christopher 16 McCarthy Drive, Ossining, New York 10562
4 KOZLOWSKI, Paul 126 Cedar Avenue, Poughkeepsie, New York 12603
PCT International Classification Number H01L21/28
PCT International Application Number PCT/EP2004/052283
PCT International Filing date 2004-09-23
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 10/672,631 2003-09-27 U.S.A.