Title of Invention

A MICRO ELECTRONIC PACKAGE AND METHOD OF FABRICATION THEREOF

Abstract A microelectronic package comprises a microelectronic die (102) having an active surface (106) and at least one side. An encapsulation material (112) is disposed adjacent the microelectronic die side(s). The encapsulation material (112) has at least one surface (110) substantially planar to the microelectronic die active surface (106). A first dielectric material layer (118) is disposed on at least a portiion of the microelectronic die active surface (106) and the encapsulation material surface (110). At least one first conductive trace (124) is then disposed on the first dielectric material layer (118). The at least one first conductive trace(s) (124) is in electrical contact with the microelectronic die active surface (106). At least one first conductive trace (124) extends adjacent the microelectronic die active surface (106) and adjacent the encapsulation material surface (110).
Full Text encapsulating said at least one microelectronic die with an encapsulation material
adjacent said at least one microelectronic die side, wherein said encapsulating material
provides at least one surface of said encapsulation material substantially planar to said
microelectronic die active surface; and
removing said protective film.
6. The method as claimed in claim 5, having:
forming at least one dielectric material layer on at least a portion of said
microelectronic die active surface and said encapsulation material surface;
fonning a via through said at least one dielectric material layer to expose a portion
of said microelectronic die active surface; and
forming at least one conductive trace on said at least one dielectric material layer
which extends into said via to electrically contact said microelectronic die active surface,
wherein said at least one conductive trace extends adjacent said microelectronic die
active surface and adjacent said encapsulation material surface.
7. The method as claimed in claim 5, comprising forming at least one additional
dielectric material layer disposed over said at least one conductive trace and said at
least one dielectric material layer.
8. The method as claimed in claim 7, wherein forming said at least one conductive
trace on said at least one dielectric layer comprises forming at least a portion of said at
least one conductive trace to extend through and reside on said at least one additional
dielectric material layer.
9. The method as claimed in claim 5, involving thermally contacting a heat
dissipation device with a back surface of said microelectronic die.
10. A method of fabricating a microelectronic package, said method comprising the
steps of;
providing an adhesive protective film suspended on a substantially rigid frame;
attaching an active surface of at least one microelectronic die to said adhesive
film;
encapsulating said at least one microelectronic die with an encapsulation material
adjacent at least one side of said microelectronic die, wherein said encapsulating
material provides at least one surface of said encapsulation material substantially planar
to said microelectronic die active surface; and
removing said adhesive protective film.
11. The method as claimed in claim 10, comprising the steps of:
fonning at least one dielectric material layer on at least a portion of said
microelectronic die active surface and said encapsulation material surface;
forming a via through said at least one dielectric material layer to expose a portion
of said microelectronic die active surface; and
forming at least one conductive trace on said at least one dielectric material layer
which extends into said via to electrically contact said microelectronic die active surface,
wherein said at least one conductive trace extends adjacent said microelectronic die
active surface and adjacent said encapsulation material surface.
12. The method as claimed in claim 10, comprising forming at least one additional
dielectric material layer disposed over said at least one conductive trace and said at
least one dielectric material layer.
13. The method as claimed in claim 12, wherein forming said at least one conductive
trace on said at least one dielectric layer involves forming at least a portion of said at
least one conductive trace to extend through and reside on said at least one additional
dielectric material layer.
14. The method as claimed in claim 10, involving thermally contacting a heat
dissipation device with a back surface of said microelectronic die.
15. A method of fabricating a microelectronic package, said method comprising the
steps of:
providing at least one microelectronic die having an active surface, a back
surface, and at least one side;
attaching said at least one microelectronic die back surface to a heat dissipation
device;
abutting a protective film against said at least one microelectronic die active
surface;
encapsulating said at least one microelectronic die and said heat dissipation
device with an encapsulation material, wherein said encapsulating material provides at
least one surface of said encapsulation material substantially planar to said
microelectronic die active surface; and
removing said protective film.
16. The method as claimed in claim 15, comprising the steps of:
forming at least one dielectric material layer on at least a portion of said
microelectronic die active surface and said encapsulation material surface;
forming a via through said at least one dielectric material layer to expose a portion
of said microelectronic die active surface; and
forming at least one conductive trace on said at least one dielectric material layer
which extends into said via to electrically contact said microelectronic die active surface,
wherein said at least one conductive trace extends adjacent said microelectronic die
active surface and adjacent said encapsulation material surface.
17. The method as claimed in claim 15, comprising forming at least one additional
dielectric material layer disposed over said at least one conductive trace and said at
least one dielectric material layer.
18. The method as claimed in claim 17, wherein forming said at least one conductive
trace on said at least one dielectric layer involves forming at least a portion of said at
least one conductive trace to extend through and reside on said at least one additional
dielectric material layer.
19. The method as claimed in claim 15, involving thinning said at least one
microelectronic die prior to attaching said at lest one microelectronic die back surface to
a heat dissipation device.
20. A method of fabricating a microelectronic package, said method comprising the
steps of:
providing an adhesive protective film suspended on a substantially rigid frame;
attaching a back surface of at least one microelectronic die to said adhesive film;
abutting a protective film against an active surface of said at least one
microelectronic die;
encapsulating said at least one microelectronic die with an encapsulation material
adjacent at least one side of said microelectronic die wherein said encapsulating
material provides at least one surface of said encapsulation material substantially planar
to said microelectronic die active surface;
removing said protective film; and
removing said adhesive protective film.
21. The method as claimed in claim 20, comprising :
forming at least one dielectric material layer on at least a portion of said
microelectronic die active surface and said encapsulation material surface;
forming a via through said at least one dielectric material layer to expose a portion
of said microelectronic die active surface; and
forming at least one conductive trace on said at least one dielectric material layer
which extends into said via to electrically contact said microelectronic die active surface,
wherein said at least one conductive trace extends adjacent said microelectronic die
active surface and adjacent said encapsulation material surface.
22. A method of fabricating a microelectronic package, comprising the steps of:
providing an adhesive protective film suspended on a substantially rigid frame;
attaching a back surface of at least one microelectronic die to at least one heat
dissipation device;
attaching a back surface of said at least one heat dissipation device to said
adhesive film;
abutting a protective film against an active surface of said at least one
microelectronic die;
encapsulating said at least one microelectronic die with an encapsulation material
adjacent at least one side of said microelectronic die, wherein said encapsulating
material provides at least one surface of said encapsulation material substantially planar
to said microelectronic die active surface;
removing said protective film; and
removing said adhesive protective film. .
23. The method as claimed in claim 22, comprising the steps of;
forming at least one dielectric material layer on at least a portion of said
microelectronic die active surface and said encapsulation material surface;
forming a via through said at least one dielectric material layer to expose a portion
of said microelectronic die active surface; and
forming at least one conductive trace on said at least one dielectric material layer
which extends into said via to electrically contact said microelectronic die active surface,
wherein said at least one conductive trace extends adjacent said microelectronic die
active surface and adjacent said encapsulation material surface.

A microelectronic package comprises a microelectronic die (102) having an active
surface (106) and at least one side. An encapsulation material (112) is disposed
adjacent the microelectronic die side(s). The encapsulation material (112) has at least
one surface (110) substantially planar to the microelectronic die active surface (106). A
first dielectric material layer (118) is disposed on at least a portiion of the microelectronic
die active surface (106) and the encapsulation material surface (110). At least one first
conductive trace (124) is then disposed on the first dielectric material layer (118). The at
least one first conductive trace(s) (124) is in electrical contact with the microelectronic
die active surface (106). At least one first conductive trace (124) extends adjacent the
microelectronic die active surface (106) and adjacent the encapsulation material surface
(110).

Documents:

147-KOLNP-2003-(06-07-2012)-FORM-27.pdf

147-kolnp-2003-abstract.pdf

147-kolnp-2003-assignment.pdf

147-kolnp-2003-claims.pdf

147-kolnp-2003-correspondence.pdf

147-kolnp-2003-description (complete).pdf

147-kolnp-2003-drawings.pdf

147-kolnp-2003-examination report.pdf

147-kolnp-2003-form 1.pdf

147-kolnp-2003-form 18.pdf

147-kolnp-2003-form 3.pdf

147-kolnp-2003-form 5.pdf

147-KOLNP-2003-FORM-27.pdf

147-kolnp-2003-gpa.pdf

147-kolnp-2003-granted-abstract.pdf

147-kolnp-2003-granted-assignment.pdf

147-kolnp-2003-granted-claims.pdf

147-kolnp-2003-granted-correspondence.pdf

147-kolnp-2003-granted-description (complete).pdf

147-kolnp-2003-granted-drawings.pdf

147-kolnp-2003-granted-examination report.pdf

147-kolnp-2003-granted-form 1.pdf

147-kolnp-2003-granted-form 18.pdf

147-kolnp-2003-granted-form 3.pdf

147-kolnp-2003-granted-form 5.pdf

147-kolnp-2003-granted-gpa.pdf

147-kolnp-2003-granted-reply to examination report.pdf

147-kolnp-2003-granted-specification.pdf

147-kolnp-2003-granted-translated copy of priority document.pdf

147-kolnp-2003-reply to examination report.pdf

147-kolnp-2003-specification.pdf

147-kolnp-2003-translated copy of priority document.pdf


Patent Number 236284
Indian Patent Application Number 147/KOLNP/2003
PG Journal Number 42/2009
Publication Date 16-Oct-2009
Grant Date 15-Oct-2009
Date of Filing 24-Feb-2003
Name of Patentee INTEL CORPORATION
Applicant Address 2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CA
Inventors:
# Inventor's Name Inventor's Address
1 MA QING 919 BRENTWOOD DRIVE SAN JOSE, CA 95129
2 MU XIAO-CHUN 19685 VIA ESCUELA DRIVE SARATOGA, CA 95070
3 FUJIMOTO HARRY 1366 LOS ARBOLES AVENUE, SUNNYVALE, CA 94087
PCT International Classification Number H01L 23/00
PCT International Application Number PCT/US2001/25060
PCT International Filing date 2001-08-10
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 09/640,961 2000-08-16 U.S.A.