Title of Invention

"AN INTERLEAVER DEVICE"

Abstract An interleaver device in a communication system, comprising: a memory (512) having a row x column matrix; an counter (513) adapted to generate write addresses of the memory, for sequentially arranging by columns an input data stream of size N in a matrix having 2m rows, J columns and R rows in a (J+l)th column; and an address generator (511) adapted to interleave addresses of the memory, for interleaving the arranged data and reads the interleaved data by rows wherein example of N, m, J and R are determined such as herein described.
Full Text Field of the Invention:
The present invention relates generally to interleaving in a communication system, and in particular, to a method of optimizing parameters according to an interleaver size for partial bit reversal order (P-BRO) interleaving and an interleaver using the same. The corresponding parent application number 1579/DELNP/2003.
Description of the Related Art:
While a sub-block channel interleaver designed in accordance with the IS- 2000 Release C (IxEV-DV) F/L specification performs P-BRO operation for row permutation similarly to an existing channel interleaver designed in accordance with the IS-2000 Release A/B spec. , the sub-block channel interleaver differs from the channel interleaver in that the former generates read addresses in a different manner and requires full consideration of the influence of a selected interleaver parameter on Quasi- Complementary Turbo code (QCTC) symbol selection.
Hence, there is a need for analyzing the operating principles of the sub-block channel interleaver and the channel interleaver and creating criteria on which to generate optimal parameters for the channel interleavers. The optimal parameters will offer the best performance in channel interleavers built in accordance with both the IS-2000 Release A/B and IS-2000 Release C.
SUMMARY OF THE INVENTION
An object of the present invention is to substantially solve at least the above problems and/or disadvantages and to provide at least the advantages described below.
Accordingly, it is an object of the present invention to provide a method of optimizing parameters for P-BRO interleaving and an interleaver using the optimizing parameters.
It is another object of the present invention to provide a method of optimizing parameters m and J according to an interleaver size for P-BRO interleaving and an interleaver using the same
To achieve the above and other objects, there are provided a P-BRO interleaver and a method for optimizing parameters according to an interleaver size for

the P-BRO interleaver. The P-BRO interleaver sequentially, by columns, arranges an
input data stream of size N in a matrix having 2m rows, (J-l) columns, and R rows in a
Jth column, The P-BRO interleaver interleaves the arranged data, and reads the
interleaved data by rows. Here, N, m. J and R are given as follows:
(Table Removed)
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other objects, features and advantages of the present invention
will become more apparent from the following detailed description of preferred
embodiments thereof when taken in conjunction with the accompanying drawings, in
which:
Fig. 1 illustrates P-BRO interleaving when N=384, m=7 and J=3 according to
an embodiment of the present invention;
Fig. 2 illustrates distances between read addresses after P-BRO interleaving
when N=384, m=7 and J=3 according to an embodiment of the present invention;
Fig. 3 illustrates P-BRO interleaving when N=408, m=7, J=3 and R=24
according to an embodiment of the present invention;
Fig. 4 illustrates the minimum intra-row distance after P-BRO interleaving
when N=408, m=7 and J=3 according to an embodiment of the present invention;
Fig. 5 is a block diagram of an interleaver to which an embodiment of the
present invention is applied;
Fig. 6 is a flowchart illustrating a first example of the optimal interleaver
parameters determining operation according to an embodiment of the present invention;
and
Fig. 7 is a flowchart illustrating another example of the optimal interleaver
parameters determining operation according to an embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Several preferred embodiments of the present invention will be described in
detail with reference to the accompanying drawings. In the drawings, the same or similar
elements are denoted by the same reference numerals, even though they are depicted in
different drawings. In the following description, a detailed description of known
functions or configurations incorporated herein have been omitted for conciseness.
Hereinbelow, a description will be made of P-BRO interleaving to which
various embodiments of the present invention are applied, as well as the principle of
determining parameters for optimal P-BRO interleaving in accordance with
embodiments of the present invention.
Fig. 5 is a block diagram of a P-BRO interleaver to which an embodiment of
the present invention is applied. Referring to Fig. 5, an address generator 511 receives an
interleaver size N, a first parameter m (i.e., Bit_Shift), a second parameter J (i.e.,
Up_Limit) and a clock signal Clock, and generates read addresses to read bit symbols
from an interleaver memory 512. The parameters m and J are determined in an higherlayer
controller (not shown) and provided to the address generator 511, or determined
according to the interleaver size N in the address generator 511. The interleaver memory
512 sequentially stores input bit symbols at write addresses corresponding to count
values of a counter 513 in a write mode, and outputs bit symbols from read addresses
received from the address generator 511 in a read mode. The counter 513 receives the
clock signal Clock, generates a count value, and provides it as a write address Write
ADDR to the interleaver memory 512.
As described above, the P-BRO interleaver writes input data sequentially in
the interleaver memory 512 in the write mode and reads data from the interleaver
memory 512 according to read addresses generated from the address generator 511. For
details of the P-BRO interleaver, reference is made to Korea Patent Application No.
1998-54131, filed on December 10, 1998, the entire contents of which are expressly
incorporated herein.
In operation, the address generator 511 generates a read address Af for
symbol permutation by
A, = 2m (i mod J) + BROm (\i / J\)
(1)
where i=0, 1 , . , N-l andN=2mxJ.
In Eq. (1), N denotes the size of an interleaver input sequence and m and J
are interleaver parameters called Up_Limit and Bit_Shift, respectively.
Fig. 1 illustrates P-BRO interleaving when N=384, m=7 and J=3. Referring
to Fig. 1, an interleaving matrix has 2m rows starting from index 0 and J columns starting
from index 0. After step 101, the row index and column index of a symbol in the
resulting matrix are expressed as Li/lJ and (i mod J), respectively. Therefore, after 2m(i
mod J)+ Li/jJ, an ith symbol in an input sequence has a number corresponding to an
Li/jJth row and an (I mod J) column as its read address. J symbols are in each row and
the distance between symbols is 2m in the row.
The row index Li/jJ is BRO-operated in step 102. If the distance between
symbols in adjacent rows of the same column is row distance drow, the BRO operation of
the row indexes results in a row permutation such that two minimum row distances drow
are 2n^2 and 2"1-', as illustrated in Fig. 2. Thus, after 2m(i mod J)+ BROnj_i/J_], the ith
symbol in the input sequence has a number corresponding to a BROnJ_i/J_lth row and an
(i mod J)th column as its read address in the third matrix from the left.
In summary, a read address sequence is generated by row permutations of a 2mx J matrix
in the P-BRO interleaver. The row-permuted matrix is read first by rows from the top to
the bottom, then subsequently reading each row from the left to the right.
For clarity of description, the distance between adjacent addresses in the
same row is defined as "intra-row distance dintra". If Jl, dintra=2m. If J=l, there is no
intra-row distance.
The distance between adjacent addresses in different rows, that is, the
distance between the last address in a row and the first address in the next row is defined
as "inter-row distance dinter". dinter is one of a plurality of values calculated from a
function of the parameters m and J. When m and J are determined, the resulting
minimum inter-row distance dinter is defined as d"'"er.
Since two minimum rows distances drow are 2m~2 and 2ni~',
Tf T 1 If J = J, djimnleirn = djnro"wn = 2-t nt-2,
Else, d™',", = (J-J)-2m -2m~' = (2-J-3)-2""'
(2)
The reason for computing d"'"er by Eq. (2) when J*l is apparent in Fig. 2. If
J=l, which implies that the interleaving matrix has only one column, d™"er is d'"^, that
is, 2n"2.
As described above, the interleaver parameters m and J are used as the
numbers of rows and columns in a read address sequence matrix and parameters for a
function that determines distances between read addresses. Consequently, the
characteristics of the P-BRO channel interleaver depend on the interleaver parameters m
and J.
Before presenting a description of a method of determining sub-block
channel interleaver parameters that ensure the best interleaving performance according
to an embodiment of the present invention, the purposes of channel interleavers in the
IS-2000 specifications, Releases A/B and C will first be described. Following that, the
interleaver parameter determination will then be described separately in two cases:
N=2mxJ; and N=2nlxJ+R.
The purpose of channel interleaving in the IS-2000 specification, Release
A/B, is to improve decoding performance, which is degraded when fading adversely
influences successive code symbols, through error scattering resulting from symbol
permutation. To improve decoding performance, interleaving must be performed such
that the distance between adjacent addresses (inter-address distance) is maximized.
Meanwhile, the purpose of sub-block channel interleaving as described in the
IS-2000 specification, Release C, is to allow a QCTC symbol selector at the rear end of
an interleaver to select appropriate code symbols according to a coding rate and thus
ensure the best performance at the coding rate, as well as to scatter errors through
symbol permutation. To achieve this purpose, interleaving must be performed such that
inter-address distances are maximized and are uniform.
Accordingly, to satisfy the requirements of the channel interleaver of the IS-
2000 specification, Release A/B, and the sub-block channel interleaver of the IS-2000
specification, Release C, an interleaver must be designed so that a read address sequence
is uniformly permuted by interleaving. This is possible by determining the interleaver
parameters m and j that maximize a minimum inter-address distance and minimize the
difference between inter-address distances.
As stated before, the inter-address distances are categorized into the intra-row
distance dinlra and the inter-row distance dintcr. The intra-row distance is a function of m
and the inter-row distance is a function of m and J. Since there are a plurality of interrow
distances, a minimum inter-row distance d™er is calculated. A minimum interaddress
distance is always 2'"~2 when J is 1, and the smaller of the minimum inter-row
distance d™'"er and the minimum intra-row distance d™,n
ra when J is not 1. The
difference between inter-address distances is 2n)~2 when J is 1, since the intra-row
distance dimra is 0, and is equal to the difference between the intra-row distance dintra and
the minimum inter-row distance d*™er when J is not 1.
This can be expressed as follows:
IfJ=l,
Else, j j min
°lntra ainter
(3)
Since N=2mxJ, 2'" is replaced by N/J in Eq. (3), it follows that
IfJ = l, 2m-2=--- = 0.25-,
4 J J
Else, d. -dmm
"intra "inter 1-
2.5
J
N
(4)
When J=3 in Eq. (4), the difference between inter-address distances is minimized. Thus
Table 1 below illustrates changes in inter-read address distances as m
increases when N=384. When J=3, a maximum difference between inter-address
distances is minimized, 64 and a minimum inter-address distance dmin is maximized, 128.
Table 1
(Table Removed)
The method of determining optimal interleaver parameters when N=2mxJ has
been described above. Now, a method of determining optimal interleaver parameters
when N=2mxJ+R will be described. Here, R is the remainder of dividing N by 2m. Thus
R is a positive integer less than 2m.
Fig. 3 illustrates P-BRO interleaving when N=408, nv=7, J=3 and R*0.
Referring to Fig. 3, similarly to the case where R=0, numbers in a row-permuted matrix
after step 302 are read as read addresses by rows from the top to the bottom, reading
each row from the left to the right, as described in step 303. Since R*0, the number of
columns is J+l, and numbers are filled in only R rows of a (J+l)th column with no
numbers in the other (2m-R) rows.
In summary, when R*0, a read address sequence is generated by a row
permutation of a 2"'xJ matrix, each row including J or J+l elements in the P-BRO
interleaver. The row-permuted matrix is read by rows from the top to the bottom,
reading each row from the left to the right.
Furthermore, when R#0, the interleaver parameters m and J are determined
such that a minimum inter-read address distance is maximized and the difference
between inter-read address distances is minimized.
An inter-row distance dinter is a function of m, 2m irrespective of whether R=0 or
However, while the minimum inter-row distance d™"er is a function of m and J when
R=0, it is a function of m, J and R when
The minimum inter-row distance is determined according to J by Eq. (5) and
Eq. (6).
ForO 2 , d™'r=2m-2
For3-2n v 2 ..... (5)
When J*\,
ForO For 2"'-' For 3 • 2""2 ...(6)
Fig. 4 illustrates how Eq. (6) is derived when m=7 and J=3. Referring to Fig.
4, when 0 distance drow of 2"1"1, the last column of the upper row being empty, is a minimum interrow
distance (dj£. = (2Jr-3)-2m"1 ). When 2nvl between two adjacent rows having a row distance drow of 2nv2, the last column of the
upper row being empty, is a minimum inter-row distance ( d"""er = (4J - 3) • 2m~2 ).
When 3-2m~2 a row distance drow of 2m~2 and elements in the last columns, is a minimum inter-row
distance ( d,™"r = (2J - 1) • 2"1' ). For example, if R=0, the minimum inter-row distance , r is
1""1 192, as indicated by reference numeral 401. If R=64 (21""1), the minimum inter-row
distance is 288, as indicated by reference numeral 402. If R=96 (3-2n>~2), the minimum
inter-row distance is 320, as indicated by reference numeral 403. In the same manner, Eq.
(5) can be derived when J=l .
Table 2 below illustrates changes in the interleaver parameters J and R, the intra-row
distance dilltra, the minimum inter-row distance d?™r , and the minimum inter-read
address distance dmin as m increases, with respect to six encoder packet (EP) sizes as
described in the IS-2000 specification, Release C.
Table 2
(Table Removed)

As described above, similarly to the case where R=0, optimal interleaver
parameters are selected which maximize a minimum inter-address distance and
minimize the difference between inter-address distances.
In Table 2, the minimum inter-read address distance dmm in the eighth column
is the smaller of the intra-row distance d- and the minimum inter-row distance -mtn rf*" .
Hence, parameters that maximize the minimum inter-read address distance dmin can be
obtained by selecting a row having the maximum value in the eighth column. For EP
sizes of 2328 and 3864, three rows and two rows satisfy this condition. In this case, rows
that satisfy another condition of minimizing the difference between inter-read address
must be selected. They are shown in bold and underlined in Table 2. The
validity of this condition is apparent by comparing the rows having the maximum dmm in
terms of n(dmi") in the last column. Here, n(dmin) indicates the number of address pairs
having a minimum inter-address distance dmi".
Rows marked in bold and underlined in Table 2 satisfy the above two
conditions for selecting optimal interleaver parameters. As noted, once the second
condition is satisfied, the first condition is naturally satisfied. For reference, it is made
clear that the intra-row distances dinlra and the minimum inter-row distances d""" listed
in Table 2 are equal to those computed on P-BRO-interleaved read addresses. Table 2
covers both cases of dividing N by 2m or J with no remainder and of dividing N by 2mor
J with a remainder R (i.e., N=2mxJ+R (0 bold and underlined are optimal for each EP size.
When N=2mx(J-l)+R (0 remainder or with a remainder R, optimal interleaver parameters for each interleaver size
N are listed in Table 3. The description made in the context of J is also applied when J is
replaced by (J-l).
Table 3
(Table Removed)
The above description has provided a method of selecting interleaver
parameters expected to offer the best performance when, for example, a channel
interleaver built in accordance with the IS-2000 Release A/B specification, and a subblock
channel interleaver built in accordance with the IS-2000 Release C specification
are used.
As described above, the optimal interleaver parameters are those that
maximize an inter-address distance and at the same time, minimize the difference
between inter-address distances when generating read addresses in a channel interleaver.
Consequently, interleaver parameters for sub-block channel interleaving in
circumstances wherein a sub-block channel interleaver is built in accordance with the IS- 2000 Release C specification are values in the rows in bold and underlined in Table 2.
While interleaver parameters selection has been described for the sub-block channel
interleaver built in accordance with the IS-2000 Release C specification, it is obvious
that the same thing can also be applied to systems of other standards.
Fig. 6 is a flowchart illustrating an optimal interleaver parameters
determining operation according to an embodiment of the present invention. Particularly,
this operation is concerned with the computation of \dinlra - d""^ . An optimal (m, J)
that minimizes dinlra - d™?er is selected by computing dinlra - d™r , changing (m, J).
Referring to Fig. 6, when an interleaver size N, and parameters m and J are
given in step 601, a parameter R is calculated by subtracting 2mxJ from N in step 603. In
step 605, it is determined whether J is 1. This is a determination, therefore, of whether
an interleaving matrix has a single column or not. If J is 1, the procedure goes to step
607 ("Yes" path from decision step 605) and if J is not 1, the procedure goes to step 621
("No" path from decision step 605). In step 607, it is determined whether R is 0(i.e.,
whether N is an integer multiple of 2m). On the contrary, if R is 0 (("Yes" path from
decision step 607), an intra-row distance dimra is set to 0 in step 609. If R is not 0 ("No"
path from decision step 607) , dintra is set to 2m in step 617.
After dintra is determined, it is determined whether R is less than 3x2n>~2 in step
61 1. If R is less than 3X2"1"2 ("Yes" path from decision step 61 1) a minimum inter-row
distance d™r is set to 2"1"2 in step 613. If R is equal to or greater than 3x2n1~2 ("No" path
from decision step 611) d"jer is set to 2mH in step 619. After d™'"r is determined,
dintra -d™l"er\ is calculated in step 615.
Meanwhile, if J is not 1 in step 605, djmra is set to 2m in step 621 and it is
determined whether R is less than 2ni~' in step 623. If R is less than 2"^' ("Yes" path
from decision step 623) d"","r is set to (2J-3)x2nv"' in step 625 and then the procedure
goes to step 615. If R is equal to or greater than 2"*"1 ("No" path from decision step 623),
it is determined whether R is less than 3x2m~2 in step 627. If R is less than 3x2m~2 ("Yes"
path from decision step 627) , d^"w is set to (4J-3)x2ni~2 in step 629. If R is equal to or
greater than 3x2n step 631 and then the procedure goes to step 615.
Optimal interleaver parameters m and J are achieved for a given N by computing
dlnlra -rffoterl » changing (m, J). If J is one of 1, 2 and 3, a logical formula that facilitates
selection of J without the repeated computation can be derived.
With a description of a logical equation deriving procedure omitted, the
logical equation is
If log2N - [log, N\ Else if log,N-\logt N\ >log23-l = 0.5849625,
For ( 1} . 2L (7)
From an optimal J from Eq. (7), an optimal m is calculated by
m= Iog2
(8)
The selection of optimal interleaver parameters by the simple logical equations is
summarized below and illustrated in Fig. 7.
1. An optimal J is obtained by Eq. (7) for a given N; and
2. m is calculated by computing Eq. (8) using N and J.
Fig. 7 is a flowchart illustrating an optimal interleaver parameters
determining operation according to another embodiment of the present invention.
Referring to Fig. 7, when N is given, a variable a is calculated by
log2N-\log2 N\ and a variable p is calculated by 2\-loglN* in step 701. Decision step
703, determines whether a is less than a first threshold, 0.5849625. If a is less than the
first threshold ("Yes" path from decision step 703), another decision is made, whether N
is less than p in decision step 705. If N is equal to or greater than p ("No" path from
decision step 705), the procedure goes to step 707. On the contrary, if N is less than p
("Yes" path from decision step 705), J is determined to be 3 in step 713.
Meanwhile, decision step 707 determines whether N is less than (3/2)xp. If
N is less than (3/2)xp ("Yes" path from decision step 707), J is determined to be 2 in
step 711. Otherwise, J is determined to be 1 in step 709 ("No" path from decision step
707).
If a is equal to or greater than the first threshold in step 703 ("No" path from
decision step 703), a decision is made whether N is less than (3/2)xp in decision step
717. If N is less than (3/2)xp ("Yes" path from decision step 717), J is determined to be
2 in step 721. Otherwise, decision step 719 determines whether N is less than (7/4)xp.
If N is less than (7/4)xp ("Yes" path from decision step 719), J is determined to be 3 in
step 723. Otherwise, J is determined to be 1 in step 725 ("No" path from decision step
719).
As described above, optimal m and J can be calculated simply by the logical
equations using N. The optimal m and J are equal to m and J resulting from repeated
computation using different (m, J) values as illustrated in Table 2. This obviates the need
for storing optimal m and J values according to N values.
When N=2328, for example, optimal m and J values are calculated in the
procedure illustrated in Fig. 7 or by Eq. (8) to Eq. (10), as follows.
a = log2N - [log, N\ = log, 2328 - [log, 2328 J = 11.1848753-11 = 0.1848753.
a _ 2l'°«-'A'J = 2^'°s-2na^ = 2" = 2048.
a ^0.5849625 and /3 = 2048 &
m =
N
\ = [log21164\ = 10. R = N-2m-J = 2328-2'° -2 = 280.
J
For reference, Eq. (7) is derived as follows.
In each case depicted in Fig. 6, Eq. (5) and Eq. (6), dinlra -d™,"er\ is determined by
A. WhenJ=l,
A-l.IfR=0, \dinlra-dZ •\rn-2 = 0-2""' =2""
-m" 2 /. - dmm
*inlra "inter
i i mill
"inlra ~" inter 2l"-2"'-' = 2"
•\rn-l 2J-5-2"•t"in-1
B. WhenJ*!,
B-l. If 0 B-2. If 2"'-' B-3. If 3•2m-2 •\rn-2
= \4J-7\-2
m-2
Since N=2mJ+R and 0 subject to a log base 2 operation,
Thus, m = . Using m = , J can be expressed as a function of N for
all the cases of A and B.
A'. When J=l, since m = \log2 N\, R = vV-2m = N-2l'°s-N]. Then the
cases A-1, A-2 and A-3 can be expressed as functions of N. It therefore follows that:
'-l • Tf - 1 . ii N/v — -
'-2A-. IIfI
inlra inler ——
A'-3 • If 1-1 . 21-'0*-' N^
\ 4 I
Il -II • 42 \-'°Sl "J, Udin ,ra -d«m/ni,"er |I - =I I -II • ^2\-'°s-' "^
d - dinler
B'. When J^l, since w = = N-J-2m =yV-/-2
Then the cases B-l, B-2 and B-3 can be expressed as functions of N instead of R.
Therefore,
(jT)^) d -dmil>
uintrn "inter
B'-2: If
J--
J + -B
/mm
1 Inter
JJ -32-
B". When J=2, since log\ — ] = [log, N - 1 J = \log2 N\-l,
L V 2 ) L, ' \ '"lra _d*ln*ler\\-~. 4
B"-2:If .
B"-3: If dntra -d
B'". When J=3,
si•n ce to,g, —
\\Jog2N\-2, iflog,N-[log,N] \jjog2 N\ -1, otherwise
if tog, ^ - [log, N\ B'"-l':If - •
{4 )
B--22--IIffUf^J.
B".-3':,ff^
(16;
16
' I infra inter
j j min
dintra ~dinter 16
j j mln
aintra ainter
8
if tog,^ - \log2 N\ > Iog2 3-1 = 0. 5849625 ,
TV" 1 "• Tf I — I -
'" 2"- Tf I 7 I • P1-'0*' N) V"^7 V oD / '
ra
o o
'"-3": If » ?l'°s.>wJ ,j — Hmil>
' •* ' "inira "m/e
that
If J is 4 or more, this case is neglected because (Equation Removed) cannot be less that
(Equation Removed) in any of the cases where J=l, 2, and 3.

inter Eq. (7) is obtained by selecting a case having a minimum (Equation Removed)among the cases of A'-l, A'-2, A'-3, B"-l, B"-2, B"-3, B'"-l', B'"-2', and B'"-3'.
Similarly, Eq. (8) is obtained by selecting a case having a minimum (Equation Removed) nmteinr
among the cases of A, A'-2, A'-3, B"-l, B"-2, B"-3, B'"-l", B'"-2", and B'"-3".
In accordance with the embodiments of the present invention as described
above, interleaver parameters m and J are simply optimized according to an interleaver
size N, for P-BRO interleaving.
While the invention has been shown and described with reference to certain
preferred embodiments thereof, it will be understood by those skilled in the art that
various changes in form and details may be made therein without departing from the
spirit and scope of the invention as defined by the appended claims.




We claim:
1. An interleaver device in a communication system, comprising:
a memory (512) having a row x column matrix;
an counter (513) adapted to generate write addresses of the
memory, for sequentially arranging by columns an input data stream of
size N in a matrix having 2m rows, J columns and R rows in a (J+l)th
column; and an address generator (511) adapted to interleave addresses
of the memory, for interleaving the arranged data and reads the
interleaved data by rows wherein example of N, m, J and R are
determined such as herein described.

Documents:

3810-delnp-2005-abstract-(20-03-2009).pdf

3810-DELNP-2005-Abstract-(24-09-2008).pdf

3810-delnp-2005-abstract.pdf

3810-delnp-2005-assignment.pdf

3810-delnp-2005-claims-(20-03-2009).pdf

3810-DELNP-2005-Claims-(24-09-2008).pdf

3810-delnp-2005-claims.pdf

3810-delnp-2005-correspondence-others-(20-03-2009).pdf

3810-DELNP-2005-Correspondence-Others-(24-09-2008).pdf

3810-DELNP-2005-Correspondence-Others-(25-09-2008).pdf

3810-delnp-2005-correspondence-others.pdf

3810-DELNP-2005-Description (Complete)-(24-09-2008).pdf

3810-delnp-2005-description (complete).pdf

3810-delnp-2005-drawings.pdf

3810-delnp-2005-form-1-(20-03-2009).pdf

3810-delnp-2005-form-1.pdf

3810-delnp-2005-form-13(26-02-2007).pdf

3810-delnp-2005-form-18.pdf

3810-delnp-2005-form-2-(20-03-2009).pdf

3810-DELNP-2005-Form-2-(24-09-2008).pdf

3810-delnp-2005-form-2.pdf

3810-delnp-2005-form-3.pdf

3810-delnp-2005-form-5.pdf

3810-DELNP-2005-GPA-(24-09-2008).pdf

3810-delnp-2005-pct-304.pdf


Patent Number 233644
Indian Patent Application Number 3810/DELNP/2005
PG Journal Number 18/2009
Publication Date 01-May-2009
Grant Date 01-Apr-2009
Date of Filing 26-Aug-2005
Name of Patentee SAMSUNG ELECTRONICS CO., LTD.
Applicant Address 416, MAETAN-DONG, PALDAL-GU, SUWON-SHI, KYUNGKI-DO, REPUBLIC OF KOREA.
Inventors:
# Inventor's Name Inventor's Address
1 KIM, MIN-GOO 968, YOUNGTONG-DONG, PALDAL-GU, SUWON-SHI, KYONGGI-DO, REPUBLIC OF KOREA.
2 HA, SANG-HYUCK 488, KOKBANJONG-DONG, KWONSON-GU, SUWON-SHI, KYONGGI-DO, REPUBLIC OF KOREA.
PCT International Classification Number H03M 13/27
PCT International Application Number PCT/KR03/00261
PCT International Filing date 2003-02-06
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 6890/2002 2002-02-06 Republic of Korea