| Title of Invention | "A SEMICONDUCTOR MEMORY CARD ACCESS APPARATUS" |
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| Abstract | A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card include volume management information. A user area following the volume management information includes a plurality of clusters. A data length NOM of an area from a master boot record and partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries in the user area are aligned, there is no need to perform wasteful processing in which two erasable blocks are erased to rewrite one cluster. |
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http://ipindiaonline.gov.in/documents/IN-PCT-2001-00606-DEL/in-pct-2001-00606-del-form-1.pdf
| Patent Number | 233608 | |||||||||
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| Indian Patent Application Number | IN/PCT/2001/00606/DEL | |||||||||
| PG Journal Number | 14/2009 | |||||||||
| Publication Date | 27-Mar-2009 | |||||||||
| Grant Date | 31-Mar-2009 | |||||||||
| Date of Filing | 06-Jul-2001 | |||||||||
| Name of Patentee | MATSUSHITA ELECTRIC INDUSTRIAL CO. LIMITED | |||||||||
| Applicant Address | 1006 OAZA KADOMA, KADOMASHI, OSKA-FU 572, JAPAN. | |||||||||
Inventors:
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| PCT International Classification Number | G06F 12/02 | |||||||||
| PCT International Application Number | PCT/JP00/07267 | |||||||||
| PCT International Filing date | 2000-10-19 | |||||||||
PCT Conventions:
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