Title of Invention

FREQUENCY REGULATING CIRCUIT.

Abstract

A frequency regulating circuit for the current-consumption dependent clock supply of a circuit arrangement. The said circuit arrangement comprises a current measuring device (2) for measuring the instantaneous current consumption of the circuit arrangement (1) and a controllable clock supply circuit (4), which has a clock generator (7) and can be connected to a clock input (11) of the circuit arrangement (1), characterized by a control device (3) for driving the clock supply circuit (4) on the basis of the measured current consumption, an increase in the current consumption of the circuit arrangement (1) filtering out individual clock pulses of a clock signal generated by the clock generator (7) for reducing the clock frequency at the output (6) of the clo9ck supply circuit.

Full Text

Frequency regulating circuit The invention relates to a frequency regulating circuit for circuit arrangements. In circuit arrangements, the current consumption often depends on what functions are currently being executed by the circuit arrangement, in digital circuits, for exaniple, significantly more current is required for a multiplication than for a simple addition. It should be taken into consideration here that a high current consumption results in heating of the digital circuit and care must therefore be taken to ensure that the circuit arrangement does not become too hot when carrying out specific functions. Moreover, the current consumption is proportional to the clock frequency with which the circuit arrangement, operates. The higher the clock frequency, the higher, of course, the current consumption, too. In order to avoid excessively great heating of the circuit arrangement, it., is known, therefore, to determine the function of the circuit arrangement with the highest current consumption and then to ascertain, when these functions are being carried out, that frequency at which the current consumption does not exceed the prmissible maximum value. The frequency thus determined is then specified as maximum operating frequency of the circuit arrangement. In the case of other functians of the circuit arrangement, however, a higher frequency and thus overall a better power . behaviour would be possible, without the maximum allowed current consumption being exceeded in the process. It is an object of the invention, therefore, to specify a frequency regulating circuit which enables a highest possible power of the circuit arrangement by utilizing Che maximum possible frequency, without the circuit arrangement being heated to an impermissibly great extent in the process. This object is achieved according to the invention by means of a frequency regulating circuit for the current-consumption-dependent clock supply of a circuit arrangement having a current measuring device for measuring the instantaneous current consumption of the circuit arrangement, a controllable clock supply circuit, which can be connected to a clock input of the circuit arrangement, and a control device for driving the clock supply circuit on the basis of the measured current consumption, or increase in the current consumption of the circuit arrangement effecting a reduction in the clock; frequency at the output of the clock supply circuit. The circuit thus measures the instantaneous current consumption and, on the basis of the latter, controls the frequency of the clock signal with which the circuit arrangement is supplied. This ensures that the circuit.it arrangement always operates with the maximum power which is possible taking account of the permissible maximum values for the current consumption. Thus, the maximum possible power is always available, without the circuit arrangement being endangered by excessively great heating. In an advantageous refinement of the clock supply circuit, the latter has a clock generator which provides, a clock signal with a constant frequency. A pulse filter is connected to the clock generator which pulse filter can be driven by the control device. In order to reduce the clock frequency to be output to the circuit arrangement, the pulse filter filters out or suppresses individual pulses from the clock signal made available by the clock generator. The invention is explained in more detail below usinq an exemplary embodiment. In the/figures: Figure 1 shows a frequency regulating circuit, according to the invention in a block illustration, and Figure 2 shows a more detailed illustration of the clock supply circuit. Figure 1 illustrates a frequency regulating circuit according to the invention in a block diagram. A circuit arrangement 1 has a voltage supply input: 10/and a ctock input 11. The voltage supply input 10 is connected to an operating voltage UB. A current I taken up by the circuit arrangement 1 is measured by a current measuring device 2.A control device 3 converts the measurement result of the current measuring device 2 into a control signal for a clock supply circuit 4. To that end, the control device is connected to a control input 5 of the clock supply circuit 4. A clock output 6 of the clock supply circuit is in turn conrected. to the clock input 11 of the circuit arrangement l. When computational operations which have a high current demand are carried out in the circuit arrangement 1, this is detected by the current measuring device 2 and, provided that this results in the maximum permissible current being exceeded, the control device 3 drives the clock supply circuit 4 in such a way that the clock frequency made available to the circuit arrangement 1 is rduced. By virtue of the reduction in the clock frequency with which the circuit arrangement 1 operates, the current consumption thereof also decreases, which is detected by the measuring device 2. On account of this, the clock frequency provided by the clock circuit is increased again, so that at any time a maximum possible clock frequency is made available. A more detailed illustration of the clock supply circuit is illustrated in Figure 2. Accordingly, the clock supply circuit has a clock generator 7, which generates a constant maximum internal frequency. Moreover, it has a pulse filter 8, which is connected to the control input 5 and the clock output 6. In order to reduce the clock frequency, as described with reference to Figure 1, individual pulses of the clock signal generated by the clock generator 7 are suppressed, which leads overall to a reduction in the clocK frequency. WE CLAIM: 1. A frequency regulating circuit for the current-consumption-dependent clock supply of a circuit arrangement having a current measuring device (2) for measuring the instantaneous current consumption of the circuit arrangement (1) and a controllable clock supply circuit (4), which has a clock generator (7) and can be connected to a clock input (11) of the circuit arrangement (1), characterized by a control device (3) for driving the clock supply circuit (4) on the basis of the measured current consumption, an increase in the current consumption of the circuit arrangement (1) filtering out individual clock pulses of a clock signal generated by the clock generator (7) for reducing the clock frequency at the output (6) of the clock supply circuit. 2. Frequency regulating circuit according to Claim 1, characterized in that the current measured by the current measuring device (2) is compared with a definable threshold value by comparison means. A frequency regulating circuit for the current-consumption-dependent clock supply of a circuit arrangement. The said circuit arrangement comprises a current measuring device (2) for measuring the instantaneous current consumption of the circuit arrangement (1) and a controllable clock supply circuit (4), which has a clock generator (7) and can be connected to a clock input (11) of the circuit arrangement (1), characterized by a control device (3) for driving the clock supply circuit (4) on the basis of the measured current consumption, an increase in the current consumption of the circuit arrangement (1) filtering out individual clock pulses of a clock signal generated by the clock generator (7) for reducing the clock frequency at the output (6) of the clock supply circuit.

Documents:

1305-kolnp-2003-granted-abstract.pdf

1305-kolnp-2003-granted-claims.pdf

1305-kolnp-2003-granted-correspondence.pdf

1305-kolnp-2003-granted-description (complete).pdf

1305-kolnp-2003-granted-drawings.pdf

1305-kolnp-2003-granted-form 1.pdf

1305-kolnp-2003-granted-form 18.pdf

1305-kolnp-2003-granted-form 2.pdf

1305-kolnp-2003-granted-form 3.pdf

1305-kolnp-2003-granted-form 5.pdf

1305-kolnp-2003-granted-gpa.pdf

1305-kolnp-2003-granted-letter patent.pdf

1305-kolnp-2003-granted-reply to examination report.pdf

1305-kolnp-2003-granted-specification.pdf