Title of Invention | A PROCESS LINE FOR UNDERFILLING A CONTROLLED COLLAPSE CHIP CONNECTION (C4) INTEGRATED CIRCUIT PACKAGE |
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Abstract | A PROCESS LINE FOR UNDERFILLING A CONTROLLED COLLAPSE CHIP CONNECTION (C4) INTEGRATED CIRCUIT PACKAGE |
Full Text | A PROCESS LINE FOR UNDERFILLING A CONTROLLED COLLAPSE CHIP CONNECTION (C4) INTEGRATED CIRCUIT PACKAGE |
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in-pct-2001-1044-mum-assignment(14-01-2005).pdf
in-pct-2001-1044-mum-cancelled pages(24-01-2005).pdf
in-pct-2001-1044-mum-claims(granted)-(24-01-2005).doc
in-pct-2001-1044-mum-claims(granted)-(24-01-2005).pdf
in-pct-2001-1044-mum-correspondence(24-01-2005).pdf
in-pct-2001-1044-mum-correspondence(ipo)-(13-10-2006).pdf
in-pct-2001-1044-mum-drawing(24-01-2005).pdf
in-pct-2001-1044-mum-form 1(14-01-2005).pdf
in-pct-2001-1044-mum-form 13(24-01-2005).pdf
in-pct-2001-1044-mum-form 19(23-10-2003).pdf
in-pct-2001-1044-mum-form 2(granted)-(24-01-2005).doc
in-pct-2001-1044-mum-form 2(granted)-(24-01-2005).pdf
in-pct-2001-1044-mum-form 3(14-01-2005).pdf
in-pct-2001-1044-mum-form 5(14-01-2005).pdf
in-pct-2001-1044-mum-form-pct-ipea-409(24-01-2005).pdf
in-pct-2001-1044-mum-form-pct-isa-210(24-01-2005).pdf
in-pct-2001-1044-mum-petition under rule 138(14-01-2005).pdf
in-pct-2001-1044-mum-petition under rule137(14-01-2005).pdf
in-pct-2001-1044-mum-power of authority(14-01-2005).pdf
Patent Number | 203889 | ||||||||
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Indian Patent Application Number | IN/PCT/2001/01044/MUM | ||||||||
PG Journal Number | 20/2007 | ||||||||
Publication Date | 18-May-2007 | ||||||||
Grant Date | 13-Nov-2006 | ||||||||
Date of Filing | 04-Sep-2001 | ||||||||
Name of Patentee | INTEL CORPORATION | ||||||||
Applicant Address | 2200 MISSION COLLEGE BOULEVARD SANTA CLARA CALIFORNIA 95052 U.S.A. | ||||||||
Inventors:
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PCT International Classification Number | N/A | ||||||||
PCT International Application Number | N/A | ||||||||
PCT International Filing date | 2000-02-08 | ||||||||
PCT Conventions:
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