Title of Invention

A FLOATING BALANCED OUTPUT CIRCUIT FOR PROVIDING A DIFFERENTIAL OUTPUT VOLTAGE IN RESPONSE TO AN INPUT VOLTAGE

Abstract

The invention relates to a floating, balanced output circuit for providing a differential output voltage in response to an input voltage, the said circuit comprising: a first transconductance amplifier section for providing a differential pair of output currents in response to the input voltage, the currents being substantially equal in magnitude and opposite in polarity; an intermediate section connected so as to generate an intermediate differential voltage in response to the pair of output currents of the first transconductance amplifier; an output section for generating the differential output voltage in response to the intermediate differential voltage; a differential feedback loop connected around the first transconductance amplifier section and the intermediate section so as to provide differential negative feedback; and a common- mode feedback loop comprising a second transconductance amplifier section connected around the intermediate section so as to respectively add a pair of substantially matched output currents to the output currents of the first transconductance amplifier stage in response to the common mode current; characterized in that the first and second transconductance amplifiers are designed so that the common mode feedback loop remains active when the differential loop has been disabled due to clipping when the input voltage exceeds a predefined level.

Full Text

The present application relates to a floating, balanced output circuits, and more specifically to an improved floating, balanced output circuit that maintains control of the common-mode output current in both output legs of the circuit even when the differential voltage output is clipped and the circuit is driving a ground-referred load. Background of the Disclosure Professional audio equipment often employs electronically-balanced output circuits intended to mimic the behavior of output transformers as closely as possible. Such circuits are designed to accept a single-ended input voltage and to produce a differential output voltage with a low differential output impedance. They are further designed to possess a substantially higher common-mode output impedance (common-mode output impedance being defuied as the impedance from either leg of the differential output to the ground or reference potential). This allows the differential output voltage to "float" with the common-mode voltage of the load, thus allowing the circuit to properly drive both balanced and ground-referred loads. This behavior is similar to that of an output transformer, wherein the differential output impedance is determined by the source impedance driving the primary reflected to the secondary (output) winding, while the impedance from either leg of the secondary winding to ground is quite high, being determined primarily by the stray-capacitance from the secondary winding to ground. A consequence of this arrangement is that the output currents exiting the two legs of the balanced output are substantially equal in magnitude and opposite in polarity regardless of the load configuration. A widely used circuit described in 1980 (T. Hay, "Differential Technology in Recording Consoles and the Impact of Transformerless Circuitry on Grounding Technique." Presented at the 67th Convention of the Audio Engineering Society, Journal of Audio Engineering Society (Abstracts), vol. 28, p.924 (Dec. 1980)) is shown in Figure 1. It accepts a single-ended input voltage VJ„ with respect to ground at terminal IN. It produces a differential output voltage (equal to twice the input voltage) between nodes OUT+ and OUT-. This circuit accomplishes the desired goals with respect to differential and common-mode output impedances. Under normal operation, the differential output impedance is substantially determined by the sum of output resistances RQ, and RQJ, as negative feedback around the operational amplifiers OA1 and OA2 substantially reduces their internal closed-loop output impedances. RQ, and R^ are typically between 10 and 100 ohms in order to keep the differential output impedance relatively low. The common-mode output impedance is quite high, and can be infinite if the ratios of the resistances labeled R and 2R in the schematic are precisely maintained. It should be noted that mismatches in these resistor ratios can either reduce the common-mode output impedance if the, mismatches are in one direction, or can lead to instability if they are in the other direction. This requirement for precise resistor-ratio matching is a drawback to this circuit. It should be clear that the common-mode behavior of the circuit ofFigure 1 is governed by both opamps, OA1 and OA2. When driving a single-ended load, as in Figure 2, the combined common-mode feedback forces the output currents to be equal and opposite (assuming exact resistor ratios around the opamps). This behavior is one of the most desirable properties of such circuits. However, if an input signal is applied to terminal IN that causes the output signal at the ungrounded output (in this case, OUT+), to exceed the maximum permitted by the power supply voltage, both the differential and common-mode feedback loops are broken. As is expected, the differential output voltage waveform at the OUT+ output would be "clipped" at the opamp"s maximum output voltage. Its output current will be the output voltage divided by the load resistance. What is not as obvious is that, while clipping is occurring, the output current of the grounded OUT- output will be quite bigh, typically limited only by any protective current limiting circuit in the opamp, or by the maximum opamp output voltage divided Dy the value of the KMo-100 ohm output resistor. This current must flow through an indeterminate path through the ground structure of the load device to return to the output stage, which can lead to disturbances on the audio wavefonn that are more audible than simple clipping. An alternative approach to a floating balanced output circuit was described in 1990 by Chris Strahm in US Patent 4,979.218. Strahm"s circuit includes separate feedback loops for differential and common-mode output signals. The differential loop is configured to force the differential output voltage to substantially equal the input voltage multiplied by some desired gain, and the common-mode feedback loop is configured to force the two output terminal currents to be equal and opposite. This at least opens up the possibility of preventing the clipping behavior and the audio waveform disturbances described above. Also, as described in the Strahm patent, precise resistor ratios are not necessary to maintain stability of the circuit. Although not mentioned in the Strahm patent, in order to prevent a grounded output of such a circuit from going into current limiting when the active output is driven into voltage clipping, the common-mode feedback loop must remain active even though the differential feedback loop is disabled. In fact, the integrated circuit device manufactured by the assignee (Audio Teknology Inc.) based on the Strahm patent is implemented in a way that does not preserve the functionality of the common-mode feedback loop when the differential feedback loop is broken due to voltage clipping into a grounded load. As shown in Figure 3, a differential pair of transistors, Qs and Q2, accept the input signal and the differential feedback signal. Transistor Q3 provides the tail current 1^ for the differential pair. Q3 is controlled by the common-mode feedback signal. In this case, the common-mode feedback signal is derived by sensing the sum of file output currents from the device, as described in the Strahm patent. Thus, the common-mode output voltage is adjusted via feedback through 1,^ until the two device output currents sum to nearly zero, and, are thus nearly equal and opposite. When voltage clipping occurs at either amplifier output, one of Q, or Q2 will saturate while the other will be cut off. If the circuit is driving a ground-referred load from the output amplifier that is driven by the cutoff transistor, then there is no way for Q3 to affect the output voltage and common-mode feedback is also disabled. Without common-mode feedback to maintain control over the output currents, the grounded output amplifier conducts as much current as permitted by other aspects of the amplifier design, such as protective current limiting. Brief Description of the Drawings Figure 1 is a schematic drawing of a prior art circuit that uses positive and negative feedback to emulate a floating voltage source; Figure 2 shows a schematic drawing of the prior art circuit of Figure 1 connected to drive a single ended load; Figure 3 shows a schematic drawing of a prior art circuit for implementing a common mode feedback loop; Figure 4 shows a schematic drawing of an improved circuit that uses separate differential and common-mode feedback loops to emulate a floating voltage source and controls the output common-mode current under clipping conditions while driving a ground-referred load; Figure 5 shows a schematic drawing of the preferred transconductance amplifiers used in the Figure 4 circuit; Figure 6 shows a schematic drawing of the differential-input, dual-output transconductance amplifier shown in Figure 5 modified to include an additional gain stage; Figure 7 shows a schematic drawing illustrates a further modification to minimize output common-mode voltage; and Figure 8 shows a schematic drawing illustrates another modification to minimize output common-mode voltage. Detailed Description of the Drawings Figure 4 shows a schematic drawing of one embodiment of an improved circuit that uses sepaiate differential and common-mode feedback loops to emulate a floating vuuagc source and controls the output common-mode current under clipping conditions while driving a ground-referred load. As shown, transconductance amplifier 1 is a circuit that accepts a differential input voltage and delivers as its outputs a pair of differential output currents such that: Amplifiers 2-5 of the circuit are part of an intermediate section connected so as to generate an intermediate differential output voltage (VI, V2) across two outputs of the intermediate section, in response to the pair of output currents of the first transconductance amplifier. This transconductance amplifier, along with identical inverting high-gain voltage amplifiers 2 and 3, identical buffer amplifiers 4 and 5, and identical compensation capacitors 6 and 7 form a two-stage fully differential operational amplifier. Resistors R[ and R2 are connected from the input voltage terminals IN+ and IN-, respectively, to the non-inverting and inverting terminals of transconductance amplifier 1, respectively. Resistors R3 and R4 are connected from the outputs of buffer amplifiers 4 and 5, respectively, to the non-inverting and inverting inputs of transconductance amplifier 1, respectively, to provide differential negative feedback. As long as the forward gain provided by transconductance amplifier 1 and voltage amplifiers 2 and 3 is large compared to the desired closed loop gain, then the differential closed loop gain Add will be substantially. either terminal IN+ or IN- can be grounded, and the input signal connected in a single-ended fashion, with no loss of functionality. Transconductance amplifier 8 is a circuit that accepts a differential input voltage and delivers as its outputs a pair of matched output currents i} and i4 such that: (4) i3 = i4 = gm2 " Vcin These output currents i3 and i4 respectively sum with the output currents i2 and // of transconductance amplifier I. Note that the output currents i3 and i4 from transconductance amplifier 8 will cause both output voltages (V^ and V,^.) to move in the same direction, while the output currents ij and ij from transconductance amplifier 1 will cause the two output voltages (v0ut+ and vout.) to move in opposite directions. Resistors R, and R,0 are used to sense the individual output currents, and preferably are of equal value between about 10 and about 100 ohms in order to maintain low differential output impedance, although the values can be outside this range. Resistors R„ and Rl2 serve to establish a minimuin common-mode load for the circuit, and are preferably between about 1 kCl and about 100 kH, although the values can be outside this range. Resistors Rj through R, form a bridge used to sense the common-mode output current. Preferably, Rj = Rj and R, = Rj. In this case the voltage vj at the junction of Rj and R* will be: OW*J|~ * CW- The large gain provided by the combination of transconductance amplifier 8 and voltage amplifiers 2 and 3 will tend to minimize the differential voltage at the transconductance amplifier"s inputs via negative feedback. This will then tend to minimize the common-mode output current, leaving only differential (equal and opposite) currents. Both transconductance amplifiers must be designed to have a maximum possible output current that is achieved when the input voltage exceeds a predefined level. (This is a natural consequence of the preferred implementations, as will be illustrated below). In order to ensure that the common mode feedback loop will remain active when the differential loop has been disabled due to clipping, the maximum output currents from transconductance amplifier 8 must be made greater than the maximum output currents from transconductance amplifier 1. As an example, assume that Rn is a short circuit, such that R|3 serves as a ground-referred load, and that the input voltage vin is sufficiently positive to drive v^ to the maximum possible positive voltage allowed by the circuit power supplies. The negative feedback path via R -*out+. It should be clear that output stages 9 and 10, consisting of voltage amplifiers 2 and 3, buffer stages 4 and 5, and compensation capacitors 6 and 7 may take many preferred forms without departing from the scope of the invention. As an example, when utilizing bipolar transistors, voltage amplifiers 2 and 3 may consist of current-source-loaded common emitter amplifiers, and buffer amplifiers 4 and 5 may consist of complementary common-collector amplifiers. Other devices, such as MOS transistors, could also be substituted with no loss of essential functionality. Also, differential feedback resistors R3 and R« could alternately be connected directly to the OUT+ and OUT- terminals, rather than to the outputs of buffer amplifiers 4 and 5. Such an arrangement would result in lower differential output impedance, but would require more elaborate frequency compensation in order to maintain stability into capacmVe loads. A preferred embodiment of transconductance amplifier 1 is shown in Figure 5. This structure comprises differential pair transistors Q, and Q2, current sources I„ I2, and I3 and optional equal-valued emitter degeneration resistors R,3 and R,4. The differential input to the transconductance amplifier is applied to the bases of Q, and Q2. The differential output currents are taken from the collectors of Q, and Q2. Preferably, the values of current sources I2 and I3 are each equal to one half of the value of current source I,. In this case, the maximum current available in either direction from the collectors of Q, and Q2 is equal to I,/2. The transconductance from the voltage between the bases of Q, and Q3 to either of the collectors of Q, or Q2 is: A preferred embodiment of transconductance amplifier 8 is also shown in Figure 5. It comprises transistors Q3, through Qg, current source I4, and optional emitter degeneration resistors RI5 through RJT. Preferably, transistor Q3 has an emitter area twice that of QA and Qs. Also, if included, the value emitter degeneration resistor R,7 is half the value of identically- valued resistors R,3 and R16. Thus, with no differential voltage applied between the base of transistor Q3 and the common bases of transistors of Q4 and Qii Qj will operate at a collector current equal to I4/2, and transistors Qt and Q5 will each operate at a collector current equal to \JA. Similarly, transistor Q6 has an emitter area twice that of transistors Q7 and Q,. Thus, ignoring base currents, the collector current of Q6 will be mirrored to the collectors of Q, and Qs with a gain of 0.5, such that each will operate at a collector current equal to one half of Q6"s collector current The differential input voltage to transconductance amplifier 8 is applied between the base of transistor Q3 and the common bases of transistors QA and Q3. Identical output currents are taken from The maximum output current available in either direction from the collectors of Q4 and Q, is equal to one half the value of current source I4. Thus, as described above, current source I4 should be made greater in value than current source I, in order to ensure that the common-mode feedback loop will remain active after the differential feedback loop is disabled by clipping. In an embodiment of the invention such as that shown in Figure 5, when the differential feedback loop has been broken due to output voltage clipping, either transistors Q7 and Qs are sinking collector currents equal to at least I(/2, or transistors Q4 and Q5 are sourcing collector currents equal to at least I,/2. Under these conditions, a current imbalance equal to the value of current source I, will exist between the collector current of Q3 and the sum of the collector currents of Q4 and Qs. This current imbalance will cause an input offset voltage (in addition to that caused by random transistor and resistor mismatches) at the inputs of transconductance amplifier 8 equal to VSmi- This additional input offset voltage will degrade the matching of the magnitudes of the currents in resistors R, and R]0 under the aforementioned conditions. If this degradation of performance is unacceptable, an additional gain stage can be added to transconductance amplifier 8 as illustrated in Figure 6. Differential pair transistors Q9 and QI0, optional identical emitter degeneration transistors Rlt and Rl9, current mirror transistors Q„ and Q,2, and current source I, make up a differential amplifier with a single-ended current output. The input voltage to transconductance amplifier 8 is applied between the bases of Q, and Q10. The output current from the collectors of Q,2 and Q,0 is applied to the base of Qs of the previously described differential-input, dual-output transconductance amplifier. The common bases of Q3 and Q4 are tied to an appropriate bias voltage source, preferably far enough below Vcc to ensure proper operation of current source I It should be understood that the functions of the circuits above can be implemented in different ways without departing from the scope of the invention. For instance, the current mirrors composed of Q6 through Qg and QM through Q1: could be any of a number of improved current mirrors known in the art such as the Wilson current mirror, the cascoded current mirror, or the emitter-follower-augmented current mirror. Additionally, each mirror could have emitter degeneration resistors added to increase the output impedance. Further, the differential inputs of transconductance amplifiers 1 and 8 could have emitter follower buffers, and/or bias current cancellation circuitry added to minimize input bias current. As mentioned above, all of the circuits could be implemented with a different transistor technology, such as MOS transistors. Referring to Figure 4, there will always exist some finite input offset voltage at the differential inputs of transconductance amplifier 8 due to transistor and resistor mismatches. Such offset voltages will give rise to a common-mode offset current flowing in. resistors R, and R10 equal to the input offset voltage divided by the resistance value of R, and R,0. These currents will then be converted to a common-mode offset voltage across resistors Rn and R,2 (and any external load resistance). As R, and R10 are preferably low-valued, as mentioned above, and Rn and R13 are preferably higher valued, a small input offset voltage at the input to transconductance amplifier 8 can result in a substantially larger common-mode output offset voltage at the OUT+ and OUT-terminals. Figure 7 illustrates one preferred method to minimize this effect In Figure 7, capacitor C, is inserted between the junction of resistors R7 and R( and the inverting input of transconductance amplifier 8. Resistor R20 is added from the inverting Input of transconductance amplifier 8 to ground. RM is preferably chosen to be large enough in value so as not to significantly load R7 and R,, preferably, although not necessarily 1 Mfi or larger if R* through Rt are all about or within a small range of 10 kCl Ct is chosen so that the high-pass filter formed by C, and R10 has a pole frequency substantially lower than the operational frequencies of interest. For example, a value of 100 nF for C, and I MQ for R10 will result in a pole frequency fpfa> of: ,(14) ^"j.too^Xuffl)"1-5*" which is well below the band of interest for audio applications. Thus, in the audio band, the common-mode feedback loop will minimize the output common-mode current, forcing equal and opposite currents in Rg and R,0. At DC, the common-mode feedback loop will tend to force the junction of Rj and Rj (and thus the output common-mode voltage) to the ground potential, plus or minus any input offset voltage at transconductance amplifier 8*s inputs. One of the primary applications for floating, balanced output circuits in the professional audio industry is to drive audio signals over cables of up to 1000 feet long. Such cables represent a reactive load on the circuit, with resonant frequencies that may coincide with the unity-gain frequency of the common-mode feedback loop. Such resonances can cause peaks in the loop transmission that will compromise the stability of the loop. The common-mode feedback loop can be isolated from these loading effects with the addition of C:, also shown in Figure 7. C2 is preferably chosen so that the lowpass filter that it forms with the parallel combination of R, and K* is substantially higher than the operation frequencies of interest, but below the unity-gain crossover frequency of the common-mode feedback loop. In a preferred embodiment, with R3 through R, all equal to about 10 kO, C, is equal to about 10 pF. This results in a pole frequency of: which is well above the audio band. Thus, the common-mode feedback loop will continue to mmimize the common-mode output current, while at frequencies substantially above 3 MHz, C2 will shunt the inverting input of transconductance amplifier 8 to ground, isolating it from the response peaks due to resonant loads. Figure 8 illustrates an alternative and preferred method of minimizing the output common-mode voltage. Capacitor C3 is inserted between the OUT- terminal and resistor R,. Likewise, capacitor Ct is inserted between the OUT+ terminal and resistor Rj. Resistor R2l is added from the junction of C3 and R, to ground, and resistor Ra is added from the junction of C4 and R, to ground. In a one implementation of this preferred embodiment C3 and C4 are each about 10 // F, and R2, and Rr are each about 20 kfl. Like the circuit shown in Figure 7, this circuit will minimize the common-mode output current in the audio band, but force the output common-mode voltage to the ground potential at DC. The circuit in Figure 8 will maintain a superior match between the output current magnitudes when driving a ground referred load compared with the circuit in Figure 7. This is due to the absence of any loading on R7 and Rg. However, this comes at the expense of an additional capacitor and an additional resistor. The embodiment and practices described in this specification have been presented by way of illustration rather than limitation, and various modifications, combinations and substitutions may be effected by those skilled in the art without departure either in spirit or scope from this disclosure in its broader aspects and as set forth in the appended claims. WE CLAIM: 1. A floating, balanced output circuit for providing a differential output voltage in response to an input voltage, the said circuit comprising: a first transconductance amplifier section for providing a differential pair of output currents in response to the input voltage, the currents being substantially equal in magnitude and opposite in polarity; an intermediate section connected so as to generate an intermediate differential voltage in response to the pair of output currents of the first transconductance amplifier; an output section for generating the differential output voltage in response to the intermediate differential voltage; a differential feedback loop connected around the first transconductance amplifier section and the intermediate section so as to provide differential negative feedback; and a common-mode feedback loop comprising a second transconductance amplifier section connected around the intermediate section so as to respectively add a pair of substantially matched output currents to the output currents of the first transconductance amplifier stage in response to the common mode current; characterized in that the first and second transconductance amplifiers are designed so that the common mode feedback loop remains active when the differential loop has been disabled due to clipping when the input voltage exceeds a predefined level. 2. The circuit as claimed in claim 1. comprising a fully-differential operational amplifier comprising the first transconductance amplifier and the intermediate section. 3. The circuit as claimed in claim 1, wherein the magnitudes of the maximum output currents from the second transconductance amplifier are greater than the magnitudes of the maximum output currents from the first transconductance amplifier. 4. The circuit as claimed in claim 1, comprising an input coupled to the first transconductance amplifier configured to receive a differential input voltage. 5. The circuit as claimed in claim 1, comprising an input coupled to the first transconductance amplifier configured to receive a single-ended input voltage. 6. The circuit as claimed in claim 1, wherein the common-mode feedback loop has a current sensing section that is operable to sense the common-mode output current and apply a voltage proportional to said common-mode output current to the inputs of said second transconductance amplifier. 7. The circuit as claimed in claim 6, wherein current sensing section has a pair of identical output resistors in series with said two outputs of the intermediate section, and a four-resistor bridge configured to produce an output voltage proportional to the sum of the currents in said identical output resistors. 8. The circuit as claimed in claim 7, wherein comprising a decoupler for decoupling the resistor bridge from reactive loads connected to the output of the circuit at high frequencies. 9. The circuit as claimed in claim 8, wherein the decoupler has a capacitor connecting one output of the bridge to ground. 10. The circuit as claimed in claim 9, wherein said resistor bridge is coupled at first and second locations, with a pair of capacitors and a pair of resistors to ground, wherein said first and second locations provide said voltage which is proportional to said common-mode output currents. 11. The circuit as claimed in claim 1, wherein said first transconductance amplifier comprises a differential pair of transistors with an emitter current source and a current-source load for each collector of said differential pair of transistors. 12. The circuit as claimed in claim 1, wherein the common-mode feedback loop has a current sensing section that is operable to sense the common-mode output current and apply a voltage proportional to said common-mode output current to the inputs of said second transconductance amplifier, and the second transconductance amplifier comprises a gain stage having first and second transistors whose bases are connected to receive the applied voltage from the current sensing section, and a third transistor connected with its base tied to the base of the second transistor, and the collectors of the second and third transistors respectively being coupled to the output of the second transconductance amplifier. 13. The circuit as claimed in claim 12, wherein the emitter area of the first transistor is twice the emitter area of each of the second and third transistors. 14. The circuit as claimed in claim 1, wherein said current sensing section is coupled at first and second locations to the input of the second transconductance amplifier, wherein the first and second locations provide said voltage which is proportional to said common-mode output current so as to minimize the affect of any offset voltage applied to the input of the second transconductance amplifier. 15. The circuit as claimed in claim 14, wherein said current sensing section has a pair of identical output resistors in series with said two outputs of the intermediate section and a four-resistor bridge operable to produce an output voltage proportional to the sum of currents in said identical output resistors and said voltage which is proportional to said common-mode output currents.

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