|Title of Invention||
|Abstract||A power converter includes a pair of switches, each of the switches being connected between positive and negative constant DC voltage sources and a common output node which is connected to a load. A modulator opens and closes the switches in a sequence in which the electrical current controlled by the switches are in opposition to one another at the common output aode, and are summed at the output node. The modulator includes a triangle wave generator and comparators which are connected to an error amplifier to provide a bearing switching voltage to the comparators. The comparators switch the control switches in response to the triangle wave generated by the triangle wave generator increasing above and decreasing below the reference levels. Underlap and overlap of the converter is controlled by varying of the DC bias level of. the triangle wave.|
|Full Text||FIELD OF INVENTION
This relates to an opposed current, pulse width modulated("PWM') power converter.
BACKGROUND OF INVENT~ON
Power converters are widely used for many industrial and commercial purposes. Such power converters may be used to convert duect current(DC) to alternating current(AC) to be used an AC power supply, or as battery charger/discharges, motor control etc. Power converters may also be used as amplifier both for entertairment(sound amplification) and industra~ uses prer art pulse width mod~Thtec~ (~WM) convertes se a ~air of switcles to connect a ode alternatively to DC power sup~Ues of opposita polarities. A modulator opens and zicses the ~ch~s in tea~o~ (not bOTh Gfl: ~ time) to produce a width modu!ated ou~pc:t siqnai that is sutse;&entv f:iy~~j.~ 2' a low pass filter before Deing transmitted to the load. In such prier al devi great care must be taken to ashore that both switches are rot turn on at the same time, but to manage the s%stem of high fidelity it is desirable that ~he switches be turn off anc on at as c '~se to tne same time as Qoss~e. in order to manage transient during switching. (referred to as ~hoot-through" a:e connectea between the switrhes. %rth~rmor~.> 3~roults known as
circuit are used to create sinai; ;2ontrc~;ed ~rne 2aOS b3tw~n tre times of the switches. Opening and closing o "ripple" frequency on the output wave form which has a frequency tha'~ is equni ½
the switching frequency of the switches. It is desirable that the magnitude of the ripple frequency be minimized. Particularly at a zero output of the power converter, which is the output at which most such devices are rated, since the most common value of the input is zero for speech and sound applications.
SUMMARY OF THE INVENTION
In the present invention, rather than there being no switch conduction overlap, the overlap is made deliberately maximal. In present invention, if zero output is desired, SI and S2 will be on simultaneously and for just less than 50% of the duty cycle. If a positive output is desired, the switch connecting the positive DC voltage source to the lode is on for greater than 50% duty cycle, while the switch connecting the negative DC voltage source to
the load is on for a correspondingly less than 50% of the duty cycle. If it is required only that the sum of the "on times" of the switches be no greater than 100% duty cycle during normal operation of the device, but the device may be operated in an underlap or overlap condition, when the sum of the on-times of the switches are less and greater, respectively, than 100% of the duty cycle. The "underlap" condition is useful, for example, for minimizing ripple and power consumption during time period when no input is being received by the converter. The "overlap" condition is used to accommodate brief demands in excess of the converter power rating.
STATEMENT OF INVENTION
Power converter comprising:
A pair of switches, each of said switches being connected between two constant voltage sources and an output node common to each of said switches, said output node being configured to be connected to a load, and modulating means as herein described for opening and closing said switches in a sequence characterized in that the said switches are concurrently activated to cause the electrical currents controlled by said switches to pass through said switches in opposition to one another, said electric currents being summed at said output node
Method for operating a power convefler comprising the steps of connecting voltage sources to a common output node through switches connecting each of said voltage sources to said output node, and opening and closing said switches in a sequence characterized in that said switches are concurrently activated to cause the electrical currents controlled by switches are in opposition to one another and summing said currents at said output node.
BRIEF DESCRIPTION OF DRAWINGS
These and other advantages of the present invention will become apparent from the following description, with reference to the accompanying drawings, in which:
Figure 1 is a circuit diagram illustrating a half-bridge power converter made according to the teachings of the prior art;
Figure 2 is a switch timing diagram illustrating the manner in which the switches of the circuit illustrated in Figure 1 are.operated;
Figure 3 is a circuit diagram illustrating the converter made according to the teachings of the present invention;
Figure 4 is a timing diagram illustrating the manner in which the switches of the circuit illustrated in Figure 3 are opened and closed;
Figure 5 is a graphical illustration of the circuit supplied to the output node by the switches of the circuit illustrated in Figure 3 and their sum;
Figure 6 is a circuit diagram illustrating a full-bridge converter made according to the teachings of the present invention;
Figure 7 is a diagrammatic illustration of the circuit used by the modulator controlling the converter illustrated in Figure 3 and made according to the teachings of the present invention;
Figure 8-12 are switching diagrams illustrating the manner ~ which the modulator of Figure 7 generates switching impuises both in a normal state and in overlapped states
DETAILED DESCRiPTION OF PREFERRED EMBODIMENTS
Referring now to Figures 1 and 2 of the drawings, which illustrates the prior art device, a prior art converter or amplifier circuit generaity indicated by the numeral 10 is applied between a moduiator 12 and a load 14(such as a
loudspeaker). The power converter 10 includes a switch 16 connected between positive direct current source 18 and node 20 and a switch 22 connected between the node 20 and a negative DC supply 24. This signal, which may be time varying, is applied to the node 20. Inductors 26, 28 are connected between the switches 16, 22 respectively and the node 20 to manage current "shoot-through" when the switches 16 and 22 are opened and closed at substantially the same time. The switches 16 and 22 are controlled by output signals generated by the modulator 12 and applied to the switches 16 and 22 through lines 30 and 32. The modulator receives a bias signal at input 34 and a feedback signal from output node 36, which is transmitted to the modulator 12 through line 38. Output node 36 is connected to the load
14. A low-pass filter, consisting of an inductor 40 and a capacitor 42, are connected between the output node 36 and node 20 to filter the switching signals generated by opening and closing of the switches 16 and 22. Switches 16, 22 may be MOSFETs or iGI3Ts ~insulated gate bipolar transistors), both of which are well known ~o those skilled in the art, and are controlled by switching signals transmitted over lines 30 and 32.
Referring now to Figure 2, the modulator generates a wave form 44 which is transmitted over line 32 to operate switch 16, and a wave form 46, which is transmitted over line 32 to operate the switch 22. As can be seen, impulses are transmitted over lines 30 and 32 in alternation; that is, the signal on line 30 which closes the switch 16 is never allowed to close the switch 16 unless the switch 22 is opencd, and vice versa. However, as discussed above, to manage for high fidelity and voice amplification it is desirable that the switch 22 be closed immediately as the switch 16 is opened and vice versa. The inductances 26 and 28 are used to manage "shoot-through" which are the transient currents ge~erated by opening and closing of the switches 16 and 22 at substantially the same time.
Referring now to Figures 3 and 4, a power converter circuit according
to the present invention generally indicated by the numeral 48 and includes a
switch 50 connecting an output node 52 to a positive DC power supply 54 and
a switch 56 connecting the output node 52 to a negative DC power supply 58.
A diode 60 allows current to freewheel with the output node 52 to the
negative DC power supply 58 when the switch 50 is reopened after being closed, and a diode 62 allows current to freewbeel with the output node 52 to the positive DC power supply 54 when the switch 56 is reopened after being closed. The signal applied to the output node 50 by the switch 50 is filtered by low-pass filter consisting of an inductance of 64 and capacitor 66, and a similar low-pass filter consisting of inductance 68 and the capacitor 66 filters the signal caused by opening and closing of the switch 56. The switches 50 and 56 are controlled by a modulator which will be discussed hereinafter in detail with reference to Figure 8. As discussed above, the switches 50 and 56 can be implemented as either MOSFETs, IGBTs, or any other similar device.
Referring to Figure 4, wave form 70 indicates the signal from the modulator (not shown) operating switch 50 and wave form 72 indicates the signal from the modulator operating the switch 56. The wave forms 70, 72 are as shown for a 50% duty cycle for each of the wave forms 70, 72. Accordingly, when summed, at the output node 52, the output will be zero, since switch 50 is connecting the output node with the positive DC supply 54 and the switch 56 is connecting the output node 52 with the negative DC supply 58. The small arrows on each of the wave forms 70 or 72 indicates the direction of modulation for an increased positive output at common supply node 52 which is connected to load 74. The wave forms 70, 72 will remain centered on one another, but the width of the wave form 72 will be decreased and the width of the wave form. 70 will be increased for increasing positive output. Conversely, for increased negative output, the wave form 72 will be increased and the wave form 70 will be decreased.
Referring to the wave forms illustrated in Figure 5, the wave form 76 represents the current in the inductance 64, the wave form 78 represents the current in the inductance 68, and the wave form 80 represents the sum of the upper and lower wave forms illustrated in Figure 5, which is the current at output node 52. It will be noted that the wave form 76 and 78 includes a ripple superimposed on the wave form, indicated between the excursions between peaks A and B on the wave form. Ths ripple frequency or impressed wave form is a result of the opening ande~closing of the switch 50 in the case of the wave form 76 and the switch 56 in the case of the wave
form 78. It will be noted that a similar wave form is impressed on the wave form 80 but the frequency of this wave form is twice the frequency of the wave form impressed upon the curves 76 and 78. This is due to the fact that the switches 50 and 56 are actuated at different times, thereby impressing a ripple on the summed wave form of double the frequency of any single switch. Higher frequency ripples are desirable because they are easier to filter. It will be also noted that at zero output, as indicated at X in Figure 5, that the ripple amplitude is substantially zero. This is because, as indicated in Figure 4, the switches 50 and 56 are actuated at about the same time at zero output current, but in opposite directions, which sum to zero. Accordingly, the ripple is zeroed out at zero output. As discussed above, DC to AC power converters are normally tested ata specification which specifies a ripple at zero output. By use of the invention, this ripple amplitude at zero output will be minimized. The ripple specification at zero output is chosen because, in the case of sound amplification, noise imposed by the ripple is most noticeable and annoying at pauses whcre no output is present. In the case of speech amplification, this is the most common condition, due to pauses between words, etc.
It will also be noted that the small inductances such as the inductances 26, 28 in Figure 1 which were required to manage shoot-through are not necessary in the invention because the switches are isolated by the inductances 64, 68 which are a part of the low-pass filter. Furthermore, as will be explained hereinafter, underlap, in which zero output may be imposed for a longer period of time, is easily achieved with the modulator necessary to operate the converter 48. Still further, the modulator is substantially simplified as compared to modulators required by the prior art, and no circuits are required to achieve underlap, which is achieved by simple shifting of a DC bias on a triangle wave form, as will hereinafter be explained.
Referring now to Figure 6, the load 74 is connected to a full-bridge converter consisting of two half-bridge converters 48A, 48B, each of which are identcal to the half-bridge converter 48 illustrated in Figure 3. Accordingly, each of the elements of each half-bridge converter 48A, 48B retain the same reference numeral, but with the addition of the letter "A" or "B". It is also
known to shift the phase of the operation of the switches of one of the half-bridges of a full-bridge converter relative to the other half-bridge. Accordingly, the ripple frequency of the current supplied to the load 70 is again doubled over that of each half-bridge. It is also known to add additional half-bridges, each of which, in the case of the invention, will increase the ripple frequency. As pointed out above, higher frequency ripples are easier to filter.
Referring now to Figure 7 of the drawings, ~.modulator generally indicated by the numeral 82 includes an error amplifier 84 which sums the difference between an input signal representing a desired level at the output node which is fed to inner amplifier 84 on input 86 and a feedback signal which is received by inner amplifier 84 on input 88. The feedback signal from input 88 is taken from the output node 52. The output of error amplifier 84 is transmitted to inverting input 87 of a comparator 8~, The OUtJ)Ot of which is transmitted on line 90 to operate switch 56. The Output of error amplifier 84 is also fed through an invertor 92 and is then transmitted to the inverting input 94 of a comparator 96, the output 98 of which is connected to operate the switch 50.
Modulator 82 also includes a triangle wave generator ~eneraliy indic~ted by the numeral 100 which receives a square wave input (generated in any conventional manner) at 102 and generates a triangle wave output on line 104 and transmitted to both the positive input 106 of the comparator 89 and the positive input 108 of the comparator 96. Triangle wave generator 100 is conventional and includes a bias control 110 for adjusting the DC level of the wave form generated by the triangle wave generator 100 up or down. The bias control 110 can be responsive to dynamic conditions, such as a pause in the case of speech transmission and-a temporary demand for power and access that is normally provided by the converter.
Referring now to Figures 8-12, the operation otthe modulator 82 and converter 48 will be described. Referring to Figure 8, the triangle wave T generated by triangle wave generator 100 is centered on zero. The output of error amplifier 84 is also assumed to be zero. In this case, both of the comparators 89 and 96 switch on at point A and off at point t3. Accordingly,
the wave form 70, 72 are generated, as illustrated in Figure 4. Both of the wave forms 70 and 72 are turned on and off at the same time, and have a period exactly one-half of the duty cycle (the duty cycles between light points on the triangle wave T, such as between points A and A or B and B.) As discussed above, the switch 50, which is connected to the positive DC supply voltage, is turned on and off by the wave form 70 and the switch 56, which is connected to the negative DC supply voltage, is turned on and off by the wave form 72. Since both of the switches 50 and 56 are on for exactly the same period of time and are on for exactly one-half of the duty cycle, the voltages transmitted through these switches, as summed at the output node 52, will be zero.
Referring now to Figure 9, the triangle wave T remains centered on zero, but that the output of amplifier 84 is + I unit. This output is fed through invertor 92 and transmitted to comparator 9(. Accordingly, comparator 96 switches on when the triangle wave exceeds -1 unit as indicated at point C, and will switch off when the triangle wave drops below one unit,, as indicated F. Similarly, the comparator 89 will switch on when the triangle wave T exceeds + 1 unit as indicated at D, and will switch off when the triangle wave T drops below one unit as indicated at E. Accordingly, wave form 70 switches on at C a~id off at F, and waveform 72 switches on at D and off at E. As can be seen in Figure 9, waveforms 70, 72 are centered on one another. Accordingly, since the wave form 70 and 72 are summed at the output node 52, a positive output is delivered to the load 74. Referring to Figure 10, where it is assumed that the output of amplifier 84 is negative one unit, the "on" time of the switches 50 and 56 are reversed from that illustrated in Figure 9, as indicated by the wave forms 70 and 72.. Accordingly, switch 56 will be turned on at point C and off at point J, and the switch 50 will be turned on at point H and off at point I. The sum of the on-time waveforms 70, 72 still remains equal to one cycle of the triangle wave T.
Figure 11 illustrates the modulator 82 and converter 48 being operated in a so-called overlap condition, such as would occur in response to a transient high power demand. It is assumed that the output of amplifier 84 is zero. In the overlap condition, the bias control 110 is operated to shift the
wave form T upwardly one unit, so that it is centered one unit above zero instead of being centered on zero as in the case of Figures 8-10. 'The ~iashed lines in Figures 11 and 12 include the position of the triangle wave form had the DC bias of the waveform not been shifted. Accordingly, both of the comparators switch on at point K and off at point L, generating identical wave forms 70 and 72 operating the switches 50 and 56. It will be noted, however, that the sum of the "on" times of the switches 50 and 56, as indicated by the wave forms 70 and 72, exceed one duty cycle of the triangle wave T. Referring to Figure 12, an underlap condition is illustrated in which the switches 50, 56 are turned on for a total cycle of less than the cycle of the triangle wave T. The underlap condition is used when, for example, no output of the converter is desired for a time period. The underlap condition is achieved by shifting the triangle wave form T do~vnwardiy one unit, by operating the bias control 110. As indicated ~n Figure 12, the triangle wave form T has been shifted downwardly one unit, so instead of being centered on zero, it is centered one unit below zero. It is also ~xs~P med that the output of the amplifier 84 is zero. In this case, as illustrated in Fizure 12, both of the wave form 70 and 72 are generated when the triangle increases zbove zero, as indicated at point M, and are ended when the triangle wave drops below point
N. Accordingly, the wave form 70 and 72 turn on and off at the same time, but their total duty cycle is less than one cycle of the triangle wave T as a result of'the downward shift in the DC bias of the trian~le wave T.
Power converter comprising:
A pair of switches, each of said switches being connected bei' voltage sources and an output node common to each of s output node being configured to be connected to a load, and r..~
as herein described for opening and closing said switcr .~ -characterized in that the said switc~1es are concurrently acti electrical currents controlled by said switches to pass thrc~~~ opposition to one another, said electric currents being sum node
Power converter as claimed in claim I wherein said
means for opening and closing each of said switches at a . cycle.
. A power converter as claimed in claim 2, wherein sad mod means for controlling the output of the said output node ~, decreasing the duty cycle of one of the said switches decreasing and increasing the duty cycle of the other switch.
A power converter as claimed in claim 1, wherein said consta x have a positive voltage source and a negative voltage so~ r switches being connected between said positive voltage ~'i common output node and the other switch beinq conriec negative voltage source and said common output rude. conducting means connected between said one switch ~i voltage source for permitting current to drain from said comsr!' c.4'w~ ~ when said one switch is opened, and a second one way connected between said other switch and said posidve v 'ucc~ tsr permitting current to drain from said common output nude 'v ~. ~ switch is opened.
A power converter as claimed in claim 1, wherein said ms~u~. means for closing one of said switches, closing the other sw;cv. the other switch before opening said one switch.
A power converter as claimed in claim 1, wherein one rJ connected to said output node through a first inductance anc~ Th.§I d~u connected to said output node through a second inductance.
A power converter as claimed in claim 1, wherein sa~d rnodu~: mes~'~s his; means for closing one of said switches arid then closiug the och~u .'~ tr, bet sre the one switch is opened.
Power converter as claimed in claim 1, wherein said rnodwa~
means for generating a first electrical signal for controilinig saic ~'n~
second electrical signal controlling the other switch. triangle ~ .
means for generating a triangle wave signai, and means for f~
first and second electrical signals as a function of the same ~
generated by said triangle wave generating means.
Power converter as claimed in claim 8, wherein said moduia~:rc ~ vie:; pair of comparators for generating said first and second elecnc vi gnci~; C(iK3 of said comparators comparing said triangle wave signal with a ~ noe c.nra:
the other comparator comparing said triangle wave signal wth ~ :nv-~:sc ~t said reference signal.
Power converter as claimed in claim 8, wherein sad ~. A has means for shifting the DC level of said triangle -~vave s.; Underlap between the output of said switches.
Power converter acting as a full brdge power converte: c~rnpr~:~ a Wc -.i half bridge power converter and a low side half bridge power visnver~' system is configured so as to connect a load in between the saK half K wherein said half bridges power converter are the power csi;v. ~ .~ -V each of said half bridges has a pair of switches, each switch c:~ ~ . being connected between constant voltage sources and a ~ common to each switch of each haif bridge, the output nodes cf i~ nnlt' being connected to said load, and modulating means for openir -md .~. said switches of said half bridges in a sequence wherein ~aio ~' ~itc~ -concurrently activated to cause the electncal currents cc.i~r' r- L switches of each half bridge to pass through said switches :n n~
another, said electrical currents being summed at the correspzis of each half bridge.
Power converter as claimed in claim 11, wherein said moduletn r--~i means for phase shifting the operation of the switches of one K. I viidc respect to the operation of the switches of the other half bridges
Power converter as claimed in claim 11, wherein sad modu~a~ ~ h~' means for controlling the output to the output nede CI ea
Power converter as claimed in one the claims 11. 12 or 13, wherer s~sd constant voltage sources have a positive voltage source and a '~r .w tve ~ source, one of said switches of each half bridge being connec~ee ~tv positive ~oltage source and said common output node and ~
each iaif bridge being connected between said negative ~oi~a ... said common output node, a first one way coriductng i-e~- or between said one switch of each half bridge and said negatve ~ for permitting current to drain from said common ou!cul ~ corresponding half bridge when said one switch of each hiK
and second one way conducting means connected between s~c~ .. '~r each half bridge and said positive voltage source for permW.n,.! - &r~ from said common output node of the corresponding half brid~e ~'. ~ n sari o~hw switch of each half bridge is opened.
Method for operating a power converter as claimed ~n dairy c r~ ~ steps of connecting voltage sources to a common output node rK ~i~k connecting each of said voltage sources to said output node a ~. ~ ~ closing said switches in a sequence characterized in that seJ ~w:cr.~~concurrently activated to cause the electrical currents contro~c> ~
in opposition to one another and summing said currents st s~.
Method as claimed in claim 15, wherein said method for oper~n~j '~, ~ of opeling and closing said switches at a controi[~d duty cyde
Method as claimed in claim 16, wherein said method for opcr?. ~'r'~-of controlling the output of the output node by increasing a~
duty cycle of one of the switches while corresponding~ - ~ .~
increasing the duty cycle of the other switch.
Method as claimed in claim 15, wherein said method for oper~i :~ ,~ -. of closing one of the switches, closing The other switch, arid 4 switch before opening said one switch.
Method as claimed in claim 15, wherein said method for opera~w of closing one of the said switches and then closing the c~w opening the one switch.
power converter and method thereof substantiaily as r~e>~ .~ illustrated in the accompanying drawings.
|Indian Patent Application Number||517/DEL/1997|
|PG Journal Number||51/2007|
|Date of Filing||28-Feb-1997|
|Name of Patentee||HARMAN INTERNATIONAL INDUSTRIES, INCORPORATED.|
|Applicant Address||8500 BALBOA BOULEVARD NORTHRIDGE, CA 91329, U.S.A.|
|PCT International Classification Number||H02M 3/335|
|PCT International Application Number||N/A|
|PCT International Filing date|