Title of Invention

POWER SEMICONDUCTOR MODULE WITH CONNECTING ELEMENTS ARRANGED DULY FLUSHED WITH MATERIAL

Abstract A power semiconductor module with a casing, connecting elements leading outwards, electrically insulating chips arranged inside of the casing, which made up of an insulation body and multiple connecting tracks electrically insulated from each other and located on its first main surface opposing the base plate is described. On these there are^ power semiconductor components and connecting elements, between two connecting tracks and 7 or between connecting tracks and power semiconductor components. The lead and connection elements are designed as metallic molds arranged as butt joint on connecting tracks with contact surfaces to these connecting tracks or to power semiconductor components, wherein the individual contact surfaces are designed as multiple partial contact surfaces. Each partial contact surface has a maximum area content of 20mm2, two each of partial contact surface have a maximum gap of 5mm between each other and the connection of the partial contact surface to the connecting tracks or the power semiconductor components is developed as being flush with material.
Full Text FORM 2
THE PATENT ACT 1970
(39 of 1970)
&
The Patents Rules, 2003
COMPLETE SPECIFICATION
(See Section 10, and rule 13)
1. TITLE OF INVENTION
POWER SEMICONDUCTOR MODULE WITH CONNECTING ELEMENTS ARRANGED
DULY FLUSHED WITH MATERIAL
2. APPLICANT(S)
a) Name : SEMIKRON ELEKTRONIK GMBH & CO. KG
b) Nationality : GERMAN Company
c) Address : POSTFACH 820251,
90253 NURNBERG,
GERMANY
3. PREAMBLE TO THE DESCRIPTION
The following specification particularly describes the
invention and the manner in which it is to be performed : -

Description
The invention describes a power semiconductor module consisting of a casing with base
plate or for mounting on a heat sink and at least one electrically insulating chip arranged in
it. This chip itself consists of an insulating body with a several mutually isolated metallic
connecting tracks on it and power semiconductor components duly connected through
circuit with these connecting tracks. Advantageously, the chip on its bottom side has a flat
metallic layer, comparable with the connecting tracks. Further, these kinds of power
semiconductor modules have connecting elements for external load and aux. contacts and
partially also connecting elements for connections in the inside of the power semiconductor
module. According to the state of technology, for this purpose materially flush connection
variants, mainly designed as soldered joints are known but also as adhesive joints.
Power semiconductor modules, which are the starting point of this invention, are known
from examples from the DE 39 37 045 A 1 or from the DE 10 2004 019 568 A 1 not pre-
published. In the DE 39 37 045 A l a power semiconductor module is represented in form of
a half bridge circuit arrangement. This power semiconductor module has metallic molds in
flat design as external load connection elements for both the DC connections and for the AC
connection. These metallic molds designed as connecting bands are arranged for the
reduction of parasitic inductivities in the inside of the module as closest as possible near
each other. Dependent of the band type design for the reduction of parasitic inductivities
these connecting bands have several "low ends" for the contact with the conducting tracks of
the chip. These low ends have a greater distance between them in comparison with their
lateral expansion.
The DE 10 2004 019 568 A 1 shows a similar design of connecting elements of a power
semiconductor module. Herein, in the vicinity of low points of the connecting elements a
number of depressions in the PCB of the chip are provided to receive excess solder material.
Herein, the low point of the connection element is designed as a part in flat design of the
connecting element which itself is designed as metallic mold, wherein this flat surface is
arranged parallel to the chip.
2

According to the printed documents said to be state of technology the chips of these kinds
of power semiconductor modules are designed as insulating chip consisting of an insulation
body as base material and for electrical insulation against a base plate or against a heat sink.
This insulation body consists - as per state of technology - of industrial ceramic for example
aluminum oxide or aluminum nitrite. On this insulation body, on its first main surface
opposing the base plate or the heat sink, there are a number metallic connecting tracks
electrically insulated from each other. On these mere are power semiconductor components
arranged. Mostly the insulation body has on the second main surface facing the base plate
or the heat sink also a metallic layer of the same material and same thickness like the
connecting tracks on the first main surface. Normally this layer however by itself is not
structured, since this for example serves the soldering connection to a base plate. The
connection tracks as well as the metallic layer of the second main surface consist preferably
of copper applied according to the DCB (direct copper bonding) process.
For connecting the said conductor tracks with the power semiconductor components
connecting elements are arranged, which are designed according to the state of technology
as metallic molds or as wire bond connections. Further, on these connecting tracks and
with connecting elements connected as flush with material, which are also designed as
metallic molds, are arranged for external electrical connection of the power semiconductor
module. The connecting elements as well as the connecting elements in the shape of
metallic molds made preferably of copper, since it has especially advantageous electrical
properties. Further, these metallic molds on their surface can have a tin or silver layer for
improving the solder properties.
Material flush connections between connecting tracks of the chip and connection or
connecting elements show the disadvantage that this connection has mechanical stresses.
These mechanical stresses have their origin in the temperature load of the power
semiconductor module. These kinds of power semiconductor modules have for example
operating temperatures between -40°C and +90°C The thermal expansion coefficient of the
lead and connection elements is determined by the material used, in this case preferably
copper. As against this the thermal expansion coefficient of the chip is mainly determined
3

by the insulation body. Through the thermal load of the power semiconductor module and
the considerably lower thermal expansion coefficient of the chip compared with that of lead
and connection elements the mechanical stress occur in the connection point between the
chip and the lead or connection element.
Further from the printed documents DE 35 05 086 A 1, DE 44 46 527 Al and DE 101 03 084
Al lead or connection elements also arranged as flush with material are known. The said
printed documents, however, do not contribute any far reaching knowledge regarding the
design of these kinds of lead or connection elements in the sense of this invention. These
show exclusively different designs of the path and the low points of the connecting
elements.
The task of the invention, which is based on it, is to introduce a material flush connection
between a lead and/or connection element and a connecting track of a chip and / or a
power semiconductor component, wherein the lead or connection element is arranged as
being suitable for the connecting track or the power semiconductor component and the
mechanical stresses in this material flush connection are effectively reduced.
The task is resolved according to the invention through the measures.of the features of claim
1. Preferred design forms are described in the sub-claims.
The invention relation thought originates from a power semiconductor module with a base
plate or for direct mounting on a heat sink. This power semiconductor module has at least
following components: a casing, connecting elements for load and aux. leads, a chip with
conductor tracks, a power semiconductor component and a connecting element.
The connecting elements for load and aux. contacts lead from the casing and serve as
electrical connection of components arranged in the inside of the casing. The electrically
insulating chip designed as base plate or heat sink itself is made of an insulation body,
preferably of industrial ceramic material and mutually electrically insulated metallic
connecting tracks located on the first main surface on the opposite side of the base plate or
the heat sink. On these connecting tracks power semiconductor components are arranged
and are connected in proper circuits, with the connecting tracks and/or other power
semiconductor component and / or connecting elements. More internal connecting
elements connect at least two connecting .tracks with each other or with power
4

semiconductor components.
At least one of these lead and / or connection elements is developed as metallic mold with
at least one contact surface to a connecting track and arranged as butt joint with this
connecting track. This at least one contact surface is designed as multiple part-contact
surfaces, wherein every part-contact surface has a maximum area of 20mm2 and two each of
part-contact surfaces have a maximum distance of 5mm between them. Further, the
connection of part-contact surfaces to the connecting tracks and/or power semiconductor
components is designed as flush with material.
Of advantage in the said design of the lead and connection elements is the fact that the
mechanical stresses are distributed on both the part-surfaces and hereby the service life, in
case of thermal load of the power semiconductor module, is extended. Especially in the
deployment of lead-free solders, which normally have a lower ductility than lead containing
solders, thus the invention based connection between the lead or connection element and
the connecting track has lower mechanical stresses and thus a high service life.
The invention related thought is explained in more details on the basis of design examples
of Fig. 1 to 4
Fig. 1 shows a power semiconductor module with arrangement of butt joint to connecting
elements.
Fig. 2 shows chips with lead and connection elements as per state of technology.
Fig. 3 shows a chip with invention based lead and connection elements.
Fig. 4 shows special designs of lead and connection elements.
Fig. 1 shows a power semiconductor module (10) with arrangement of butt joint with
connecting elements. Represented is the arrangement of a PCB (100) and a power
semiconductor module (10) in the side view, wherein the PCB (100) and the power
semiconductor module (10) are shown as being at slight distance from each other. The
power semiconductor module (10) itself has a base plate (20). On this the frame type casing
(30) and both the chips (50) are arranged. Each chip (50) consists of an insulation body (54)
and of metallic laminations, which are arranged on both the main surfaces. The metallic
5

lamination (53) facing the base plate (20) is designed as flat surface and not structured. As
against this the lamination facing the inside of power semiconductor module is structured
in itself and thus forms the conductor tracks (54) of the chip.
On these conductor tracks (54) the power semiconductor components (56) are arranged. The
electrical connecting elements form the power leads (40) and the aux. leads (60). The press
contacted aux. leads (60) are designed as contact springs and require pressurization for
secure electric contacting between the conductor tracks (54) of the chip (50) and allocated
conductor tracks (120) of the PCS (100).
The connecting elements (40) of the power leads are formed through metallic molds, which
at their one end soldered with the allocated conductor track (54) of the chip (50) as butt
joint and at their other end have a cavity for screwed connection.
The casing (30) as a single piece forming a frame and a lid has molded shapes for
positioning and fixing of power leads (40) and aux. leads (60). Each of the power leads are
fixed in a molded shape of the casing
The PCB (100) has conductor tracks (120) on its side facing the power semiconductor
module. These form the contact points of the contact springs and serve thus for the
connection to the conductor tracks (54) of the chip (50).
More lead connections of power leads (40) for connecting to the DC intermediate circuit
and the load are designed here as cable connections (220).
Fig. 2a shows a chip (50) with lead (40) and connection elements (70) as per the state of
technology. Represented here are the insulation body (52) of the chip (50) and the
conductor tracks (54) designed on this. On two of these conductor tracks (54) one power
semiconductor component (56) each is arranged. One of these power semiconductor
components (56) is connected, for example, by means of wire bonding connections (72)
with a neighboring conductor track (54).
On this conductor track (54) a connecting element (40) as per state of technology is arranged.
This connecting element (40) is designed as metallic mold and has a section (42) parallel to
the chip (50), which forms the contact surface (420) to the chip (50) or to its connection track
(54). This section is connected - as duly flushed with material - by means of a soldered
6

connection with the conductor track (54) not explicitly shown, A connecting element (70)
connects two conductor tracks (54) with each other. This connecting element (70) is also
designed as metallic mold and has at the connecting points, the contact surfaces (720) to the
conductor tracks (54) also each one of related section (72) parallel to the chip (50). In similar
type of design also connecting elements (70) between a conductor track (54) and a power
semiconductor component are known since a long time, here represented is the alternative
variant by means of a wire bonded connection (80).
Fig. 2b shows mainly the same arrangement and the same components like Fig. 2a. In
contrast to Fig. 2a the lead (40) and connection elements (70) here have no sections parallel to
the chip (50). Here the lead (40) and connection elements (70) are soldered as butt joint by
means of their contact surfaces (400,700) on the connecting tracks (54).
Fig, 3 shows a chip (50) with invention based lead (40) and connection elements (70). The
major components, like chip (50) and power semiconductor components (56) are identical
like those in Fig. 2a. In contrast to Fig. 2b here the lead (40) and connection elements (70) are
further developed according to the invention. The connecting element (40) is also soldered
as butt joint on the connecting track (54). However, the contact surface between connecting
element (40) and connecting track (54) is designed not as a continuous surface but as two
partial surfaces (402).
For this purpose, the metallic mold of the lead element (40) has a cavity (44). This cavity (44)
starts from the metallic mold surface facing the chip (50) and stretches itself in triangular
shape from the first (404) to the second main surface (406). Herein the area content of each
partial surface (402) is smaller than 20mm2 and the distance between the partial surfaces
(402) between 1mm and 5mm, The materially flush connection between the conductor track
(54) and the connecting element (40) is designed as solder joint, wherein the soldering
reaches in the cavity (44) and thus fills this nearly fully or fully.
In the same manner also the connecting element (70) is designed. Herein the contact surfaces
also have a division in two partial contact surfaces (702), each with a triangular shaped
cavity (74).
Fig. 4 shows, for example, special designs of parts of lead (40) or connection elements (70).
Fig. 4a shows a design of the cavity (44a) according to Fig. 3, wherein here however the
narrow edges area additionally matched. Further, here the individual partial contact
surfaces (402, 702) are shown in plane view as well as their distance (1mm each other.
7

Fig. 4b shows a slotted design of the cavity (44a, 74a) of the lead (40) or connection elements
(70). Herein the slot is designed as suitable for soldering starting from the contact surface.
This kind of a slot (44a, 74a) is advantageously not filled fully with solder while preparing
the solder joint. Distanced from the contact surface the metallic mold has as contraction (46,
76) still two more slots arranged orthogonal to the first for compensating the torsion forces.
Fig. 4c shows a design of a lead (40) or connection element (70) with two cavities (4'4a, 74a)
as per Fig. 4a. A multiple of such kind of cavities (44a, 74a) further reduce the mechanical
stresses. However, also a minimum area size of partial surfaces of 4mm2 is advantageous.
The individual contact surfaces (402, 702) are in-turn shown in plane view, as well as their
distance (1mm Fig. 4d shows a lead (40) or connection elements (70) as per Fig. 4a, which has, however, in
defined distance from the contact surface two slots separated from each other but in
overlapping position, which form here two contractions (48, 78) and serves as strain relief.
8

We Claims
1. Power semiconductor module (10) with a base plate (20) or for direct mounting on a heat
sink at least consisting of a casing (30), lead elements (40) leading outwards for external
load contacts, at least one electrically insulating chip (50) arranged within the casing
(30), which itself consists of an insulating body (54) and on it the base plate (20) or
multiple metallic connecting tracks (52) insulated electrically from each other located on
the first main surface on the opposite side of the heat sink, power semiconductor
components (56) located on these and connecting elements (70), between two connecting
tracks (54) and / or between connecting tracks (54) and power semiconductor
components (56), wherein at least one lead (40) and / or connection element (70) is
designed as metallic mold arranged as butt joint on connecting tracks (54) with contact
surfaces to these connecting tracks (54) and / or to power semiconductor components
(56), wherein the contact surfaces are designed as a number of partial contact surfaces
(402, 702), wherein each partial contact surface (402, 702) has a maximum area content of
20mm2, each of two partial contact surfaces (402, 702) has a maximum gap of 5mm
between each other and wherein the connection of partial contact surfaces (402, 702) to
the connecting tracks (54) and / or power semiconductor components (56) is designed as
flush with material,
2. Power semiconductor module (10) as per claim 1, wherein the lead (40) and / or
connection elements (70) are designed as metallic molds of copper having tin or silver
surface.
3. Power semiconductor module (10) as per claim 1, wherein the partial surfaces (402, 702)
have a gap of 1mm to 5mm from each other.
4. Power semiconductor module (10) as per claim 3, wherein the lead (40) and / or
connection element (70) has between the partial contact surfaces (402, 702) cavities (44a),
which are designed as triangular shape with the base at the contact surface.
5. Power semiconductor module (10) as per claim 3, wherein the lead (40) and / or
connection element (70) has between the partial contact surfaces (402, 702) cavities (44b),
which are designed as slots designed suitable for soldering starting from the contact
surfaces.
6. Power semiconductor module (10) as per claim 1, wherein the lead (40) and /or
9

connection element (70) in their run near the vicinity of the contact surfaces has
contractions {46, 48, 76, 78).
7. Power semiconductor module (10) as per claim 6, wherein the lead (40) and 7 or
connection element (70) has contractions of such kind, that two contractions at low gap
between each other (46,48,76,78) form a strain relief.
10
Dated this day of March, 2006


Documents:

484-mum-2006-abstract(29-3-2006).doc

484-mum-2006-abstract(29-3-2006).pdf

484-MUM-2006-CANCELLED PAGE(19-3-2013).pdf

484-mum-2006-claims(29-3-2006).doc

484-mum-2006-claims(29-3-2006).pdf

484-MUM-2006-CLAIMS(AMENDED)-(19-3-2013).pdf

484-MUM-2006-CORRESPONDENCE(15-11-2010).pdf

484-MUM-2006-CORRESPONDENCE(19-3-2013).pdf

484-MUM-2006-CORRESPONDENCE(22-2-2008).pdf

484-MUM-2006-CORRESPONDENCE(IPO)-(22-2-2012).pdf

484-mum-2006-correspondence(ipo)-(9-11-2010).pdf

484-mum-2006-description(complete)-(29-3-2006).pdf

484-MUM-2006-DRAWING(19-3-2013).pdf

484-mum-2006-drawing(29-3-2006).pdf

484-MUM-2006-ENGLISH TRANSLATION(19-3-2013).pdf

484-MUM-2006-ENGLISH TRANSLATION(23-7-2012).pdf

484-mum-2006-form 1(29-3-2006).pdf

484-MUM-2006-FORM 18(22-2-2008).pdf

484-mum-2006-form 2(29-3-2006).doc

484-mum-2006-form 2(29-3-2006).pdf

484-mum-2006-form 2(title page)-(29-3-2006).pdf

484-MUM-2006-FORM 3(19-3-2013).pdf

484-mum-2006-form 3(29-3-2006).pdf

484-MUM-2006-FORM 5(19-3-2013).pdf

484-mum-2006-form 5(29-3-2006).pdf

484-MUM-2006-GENERAL POWER OF ATTORNEY(19-3-2013).pdf

484-mum-2006-general power of attorney(29-3-2006).pdf

484-MUM-2006-OTHER DOCUMENT(19-3-2013).pdf

484-MUM-2006-PETITION UNDER RULE-137(19-3-2013).pdf

484-MUM-2006-REPLY TO EXAMINATION REPORT(19-3-2013).pdf

484-MUM-2006-REPLY TO EXAMINATION REPORT(23-7-2012).pdf

abstract1.jpg


Patent Number 258740
Indian Patent Application Number 484/MUM/2006
PG Journal Number 06/2014
Publication Date 07-Feb-2014
Grant Date 03-Feb-2014
Date of Filing 29-Mar-2006
Name of Patentee SEMIKRON ELEKTRONIK GMBH & CO. KG
Applicant Address POSTFACH 820251,90253 NURNBERG
Inventors:
# Inventor's Name Inventor's Address
1 JURGEN STEGER SCHULSTR. 3 91355 HILTPOLTSTEIN
2 YVONNNE MANZ ZUR ALTEN BURG 15 91085 WEISENDORF
PCT International Classification Number H01L23/34
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 102005016650.4-33 2005-04-12 Germany