Title of Invention

"AN INTEGRATED CIRCUIT DEVICE FOR PROCESSING DATA HAVING ON-BOARD DIAGNOSTIC CIRCUITRY"

Abstract An integrated circuit device for processing data having on-board diagnostic circuitry, said integrated circuit device, characterized in that, a functional unit (10, 12, 14, 16) operable to perform data processing operations; a diagnostic unit (8) operable to perform diagnostic operations upon said functional unit; and an interface unit (4) operable to provide communication between said diagnostic unit and an external diagnostic device; said interface unit (4) uses a bi-directional serial signal to transfer (i) control signals from said external diagnostic device to said diagnostic unit to control said diagnostic operations of said diagnostic unit; and (ii) diagnostic data between said external diagnostic device and said diagnostic unit; and said interface unit (4) is operable in a training mode to be responsive to a training signal of a predetermined form sent from said external diagnostic device using said bi-directional serial signal to determine sample point timing for sampling said be-directional serial signal.
Full Text


WE CLAIM:
1. An integrated circuit device for processing data having on-board diagnostic circuitry, said
integrated circuit device, characterized in that,
a functional unit (1 0, 12, 14, 16) operable to perform data processing operations;
a diagnostic unit (8) operable to perform diagnostic operations upon said functional unit;
and
an interface unit (4) operable to provide communication between said diagnostic unit and
an external diagnostic device;
said interface unit (4) uses a bi-directional serial signal to transfer:
(i) control signals from said external diagnostic device to said diagnostic unit to control
said diagnostic operations of said diagnostic unit; and
(ii) diagnostic data between said external diagnostic device and said diagnostic unit; and
said interface unit (4) is operable in a training mode to be responsive to a training signal
of a predetermined form sent fi-om said external diagnostic device using said bi-directional serial
signal to determine sample point timing for sampling said be-directional serial signal.
2. An integrated circuit device as claimed in claim 1, wherein said diagnostic unit is
operable to perform one or more of:
debugging operations;
manufacturing test operations;
manufacturing programming operations; and
manufacturing configuration operations.
3. An integrated circuit device as claimed in any one of claims 1 and 2, wherein said
interface unit is configured to use said bidirectional serial signal to communicate a reset signal
from said external diagnostic device to said diagnostic unit, said reset signal being operative to
reset said diagnostic unit.
4. An integrated circuit device as claimed in claim 3, wherein said interface unit configured
to detect said reset signal as said external diagnostic device holding said bi-directional serial
signal at a predetermined reset level for a predetermined reset period.
5. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is configured to use said bi-directional serial signal to communicate a pacing signal
from said diagnostic unit to said external diagnostic device, said pacing signal being operative to
indicate whether or not said diagnostic unit is ready for communication.
6. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is configured to use said bi-directional serial signal to communicate a pacing signal
from said diagnostic unit to said external diagnostic device, said pacing signal being operative to
indicate whether or not said diagnostic unit has completed an operation.
7. An integrated circuit device as claimed in claims 5 and 6, wherein said interface unit is
configured to use a bi-directional serial signal having a serial signal protocol comprising
different time slots for communicating different signals, said diagnostic unit forcing said bidirectional
serial signal to a predetermined pacing level during a pacing signal time slot.
8. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is configured to use a bi-directional serial signal having a serial signal protocol
comprising different time slots for communicating different signals, said bi-directional serial
signal being operable to communicate a start signal indicative of a start of a frame of serial data,
said start signal being said bi-directional serial signal being driven to a predetermined start level
to define a start signal time slot.
9. An integrated circuit device as claimed in claim 8, wherein said interface circuit is configured
such that said communication is held idle by said external diagnostic device holding said bidirectional
serial signal at a level different to said predetermined start level and thereby delaying
said start signal time slot until said bi-directional serial signal changes to said predetermined start
level followed by a next frame of data being communicated.
10. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is configured to use a bi-directional serial signal having a serial signal protocol
comprising different time slots for communicating different signals, said bi-directional serial
signal being operable to communicate a stop signal indicative of an end of a frame of serial data,
said stop signal being said bi-directional serial signal being driven to a predetermined stop level
during a stop signal time slot.
11. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is operable in a non-clocked mode in which said communication is clocked in
dependence upon transitions detected within said hi-directional serial signal.
12. An integrated circuit device as claimed in claims 10 and 11, wherein said diagnostic unit
uses receipt of a first part of said stop signal to indicate an abort of diagnostic operations.
13. An integrated circuit device as claimed in any one of claims 10, 11 and 12, wherein said
diagnostic unit uses receipt of a second part of said stop signal to confirm receipt of said h e of
serial data by said diagnostic unit.
14. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is operable in a training mode to be responsive to a training signal of a
predetermined form sent from said external diagnostic device to determine sample point timing
for sampling said bi-directional serial signal.
15. An integrated circuit device as claimed in claim 14, wherein said interface unit initializes
into said training mode.
16. An integrated circuit device as claimed in claim 157 wherein said initialization follows a
reset of said interface unit.
17. An integrated circuit device as claimed in any one of claims 5 to 16, wherein said
interface unit is operable in a training mode to be responsive to a training signal of a
predetermined form sent from said external diagnostic device to determine sample point timing
for sampling said bi-directional serial signal and said pacing signal indicates that training has
completed successfully.
18. An integrated circuit device as claimed in any one of the preceding claims, wherein said
diagnostic unit comprises one or more of:
(i) one or more scan chains operable to capture diagnostic data from said functional
circuitry;
(ii) one or more scan chains operable to apply diagnostic data to said functional circuitry;
and
(iii) one or more debug bus access circuits operable to provide communication via a bus
within said functional unit.
19. An integrated circuit device as claimed in any one of the preceding claims, wherein said
interface unit is operable:
(i) in a clocked mode in which said communication is clocked by a separate clock signal
used by said integrated unit; and
(ii) in a non-clocked mode in which said communication is clocked in dependence upon
transitions detected within said bi-directional serial signal.
20. An integrated circuit device as claimed in claim 19, wherein in said clocked mode, said
communication is clocked by a clock signal being a multiple of a clock signal used by said
integrated unit.
21. An integrated circuit device as claimed in claims 19 and 20, wherein said interface unit is
operable to initialize in said non-clocked mode and is switchable to said clocked mode.
22. An integrated circuit device as claimed in any of the preceding claims on which
diagnostic operations are performed by a diagnostic device, said diagnostic device comprising:
said interface circuit uses a bi-directional serial signal to transfer:
(i) control signals from said diagnostic device to said integrated circuit to control
diagnostic operations of performed by said integrated circuit; and
(ii) diagnostic data between said diagnostic device and said integrated circuit.

Documents:

1316-delnp-2005-Abstract-(17-10-2013).pdf

1316-delnp-2005-abstract.pdf

1316-delnp-2005-Claims-(17-10-2013).pdf

1316-delnp-2005-claims.pdf

1316-delnp-2005-Correspondence Others-(26-08-2013).pdf

1316-delnp-2005-Correspondence Others-(17-10-2013).pdf

1316-delnp-2005-Correspondence-Others-(04-02-2013).pdf

1316-delnp-2005-Correspondence-Others-(23-08-2013).pdf

1316-delnp-2005-correspondence-others.pdf

1316-delnp-2005-correspondence-po.pdf

1316-delnp-2005-description (complete).pdf

1316-delnp-2005-drawings.pdf

1316-delnp-2005-form-1.pdf

1316-delnp-2005-form-18.pdf

1316-delnp-2005-Form-2-(17-10-2013).pdf

1316-delnp-2005-form-2.pdf

1316-delnp-2005-form-3.pdf

1316-delnp-2005-form-5.pdf

1316-delnp-2005-gpa.pdf

1316-delnp-2005-petition-137.pdf


Patent Number 257696
Indian Patent Application Number 1316/DELNP/2005
PG Journal Number 44/2013
Publication Date 01-Nov-2013
Grant Date 28-Oct-2013
Date of Filing 01-Apr-2005
Name of Patentee ARM LIMITED
Applicant Address 110 FULBOURN ROAD, CHERRY HINTON, CAMBRIDGE CB1 9NJ, ENGLAND
Inventors:
# Inventor's Name Inventor's Address
1 PAUL KIMELMAN 110 CASTLE CREST ROAD, ALAMO, CA 94507, U.S.A.
2 IAN FIELD 1756 CARMEL DRIVE, #222 WALNUT CREEK, CA 94596, U.S.A
PCT International Classification Number G06F 13/42
PCT International Application Number PCT/GB2003/004007
PCT International Filing date 2003-09-17
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 10/417,330 2003-04-17 U.S.A.