Title of Invention	"A PROCESS FOR INCREASING THE NUMBER OF FREQUENCY SPOTS FOR GIVEN RESOURCES OF A FREQUENCY SYNTHESIZER"
Abstract	This invention relates to a process for increasing the number of frequency spots for given resources of frequency synthesizer. The process comprises providing the phase control signal to an accumulator for adding the phase increment at its input to its previous output to obtain the resultant phase; partitioning the resultant phase into coarse and fine parts by a phase - slicer block; addressing the partitioned coarse and fine parts of the phase to respective look-up tables; combining trigonometrically the output of the look-up tables to generate the in phase (I-channel) and quadrature phase (Q-channel) signal of the desired frequency.

Title of Invention

"A PROCESS FOR INCREASING THE NUMBER OF FREQUENCY SPOTS FOR GIVEN RESOURCES OF A FREQUENCY SYNTHESIZER"

Abstract

This invention relates to a process for increasing the number of frequency spots for given resources of frequency synthesizer. The process comprises providing the phase control signal to an accumulator for adding the phase increment at its input to its previous output to obtain the resultant phase; partitioning the resultant phase into coarse and fine parts by a phase - slicer block; addressing the partitioned coarse and fine parts of the phase to respective look-up tables; combining trigonometrically the output of the look-up tables to generate the in phase (I-channel) and quadrature phase (Q-channel) signal of the desired frequency.

Full Text	FIELD OF INVENTION; This invention relates to Frequency synthesizer and more particularly to a process for increasing the number of frequency spots, for given resources of a frequency synthesizer and a frequency synthesizer implementing said process. BACKGROUND OF THE INVENTION Direct Digital Synthesizer (DDS) synthesize the signal (sine or cosine or both) of variable frequency using lookup table method. In this technique of frequency synthesis, one complete cycle of signal is stored in lookup table and signals are synthesized by addressing the lookup table. In DDS the input phase or tuning word, to accumulator is calculated based on output frequency required. Accumulator output is used to address the lookup table to convert the output of the accumulator, instantaneous phase, to corresponding amplitude of the signal. The frequency of the signal can be changed by changing the input to accumulator, which is also termed as control word of DDS. Because of this simple synthesis mechanism, DDS offers very fast frequency switching. The prime limitation of DDS comes from the limited size of lookup table. The three of important parameters of DDS are frequency step size, frequency resolution and number of frequency spots. The improvement in any of these parameters requires the lookup table size to grow. The available hardware resource limits the size of lookup table thus limiting the achievable figures for these parameters. There are some ways presently used to overcome some of these limitations, some of them are listed below. First and popular among these is the truncation method. This method uses an accumulator with large word size and the high precision accumulator output is converted to low precision one by truncating some LSBs, depending upon the size of lookup table, to match with the table size. Truncating the accumulator output introduces time base jitter, which results into the undesired phase modulation of the output wave form and increase the spurious level in the output signal. Besides this spectral impurity, it increases the noise floor and it does not improve the number of frequency spots. We claim: 1. A process for increasing the number of frequency spots for given resources of a frequency synthesizer, the process comprises providing the phase control signal to an accumulator for adding the phase increment at its input to its previous output to obtain the resultant phase; partitioning the resultant phase into coarse and fine parts by a phase - slicer block; addressing the partitioned coarse and fine parts of the phase to respective look-up tables; combining trigonometrically the output of the look-up tables to generate the in phase (I-channel) and quadrature phase (Q-channel) signal of the desired frequency. 2. The process as claimed in claim 1, wherein pure sine and cosine wave of desired frequency is generated and generation of signal from coarse and fine phase value is exact. 3. The process as claimed in claim 1, wherein coarse part of the phase is addressed to respective sine (coarse) and cosine (coarse) look-up tables. 4. The process as claimed in claim 1, wherein fine part of the phase is addressed to respective sine (fine) and cosine (fine) lookup tables. 5. The process as claimed in claim 3, wherein look-up tables generate the amplitude SA and CA respectively for sine and cosine for coarse phase. 6. The process as claimed in claim 4, wherein look-up tables generate the amplitude SB and CB respectively for sine and cosine for fine phase. 7. A frequency synthesizer employing the process as claimed in claim 1, which comprises an accumulator for adding the phase increment at its input to its previous output to obtain the resultant phase; a phase slicer block for partitioning the resultant phase into coarse and fine parts; a plurality of lookup tables to generate the amplitude of the sine and cosine wave corresponding to coarse and fine phase; a plurality of mixers and adders provided at the output of the tables to combine trigonometrically to generate the sine and cosine values of the input phase; wherein the predetermined space for in phase (I- channel) and quadrature phase (Q-channel) is partitioned into two smaller lookup tables for increasing the number of frequency spots for given resources of the frequency synthesizer. 8. The frequency synthesizer as claimed in claim 7, wherein the frequency step size is inversely proportional to the square of the look-up table size. 9. The frequency synthesizer as claimed in claim 7, wherein the look-up tables are equally partitioned for the fine and coarse part of the phase increment. 10. The frequency synthesizer as claimed in claim 7, wherein me accumulator is a feedback adder. 11. The frequency synmesizer as claimed in claim 7, wherein the first look up table stores the phase to amplitude conversion values for coarse phase increment for a complete cycle of the wave. 12. The frequency synthesizer as claimed in claim 7, wherein the second look-up table stores the values corresponding to fine phase increment between two phase - values of the first table.

Full Text

FIELD OF INVENTION;
This invention relates to Frequency synthesizer and more particularly to a process for increasing the number of frequency spots, for given resources of a frequency synthesizer and a frequency synthesizer implementing said process.
BACKGROUND OF THE INVENTION
Direct Digital Synthesizer (DDS) synthesize the signal (sine or cosine or both) of variable frequency using lookup table method. In this technique of frequency synthesis, one complete cycle of signal is stored in lookup table and signals are synthesized by addressing the lookup table. In DDS the input phase or tuning word, to accumulator is calculated based on output frequency required. Accumulator output is used to address the lookup table to convert the output of the accumulator, instantaneous phase, to corresponding amplitude of the signal. The frequency of the signal can be changed by changing the input to accumulator, which is also termed as control word of DDS. Because of this simple synthesis mechanism, DDS offers very fast frequency switching.
The prime limitation of DDS comes from the limited size of lookup table. The three of important parameters of DDS are frequency step size, frequency resolution and number of frequency spots. The improvement in any of these parameters requires the lookup table size to grow. The available hardware resource limits the size of lookup table thus limiting the achievable figures for these parameters.
There are some ways presently used to overcome some of these limitations, some of them are listed below.
First and popular among these is the truncation method. This method uses an accumulator with large word size and the high precision accumulator output is converted to low precision one by truncating some LSBs, depending upon the size of lookup table, to match with the table size. Truncating the accumulator output introduces time base jitter, which results into the undesired phase modulation of the output wave form and increase the spurious level in the output signal. Besides this spectral impurity, it increases the noise floor and it does not improve the number of frequency spots.

We claim:
1. A process for increasing the number of frequency spots for given resources of a frequency
synthesizer, the process comprises
providing the phase control signal to an accumulator for adding the phase increment at its input to its
previous output to obtain the resultant phase;
partitioning the resultant phase into coarse and fine parts by a phase - slicer block;
addressing the partitioned coarse and fine parts of the phase to respective look-up tables;
combining trigonometrically the output of the look-up tables to generate the in phase (I-channel) and
quadrature phase (Q-channel) signal of the desired frequency.
2. The process as claimed in claim 1, wherein pure sine and cosine wave of desired frequency is generated and generation of signal from coarse and fine phase value is exact.
3. The process as claimed in claim 1, wherein coarse part of the phase is addressed to respective sine (coarse) and cosine (coarse) look-up tables.
4. The process as claimed in claim 1, wherein fine part of the phase is addressed to respective sine (fine) and cosine (fine) lookup tables.
5. The process as claimed in claim 3, wherein look-up tables generate the amplitude SA and CA respectively for sine and cosine for coarse phase.
6. The process as claimed in claim 4, wherein look-up tables generate the amplitude SB and CB respectively for sine and cosine for fine phase.
7. A frequency synthesizer employing the process as claimed in claim 1, which comprises
an accumulator for adding the phase increment at its input to its previous output to obtain the resultant
phase;
a phase slicer block for partitioning the resultant phase into coarse and fine parts;
a plurality of lookup tables to generate the amplitude of the sine and cosine wave corresponding to
coarse and fine phase;

a plurality of mixers and adders provided at the output of the tables to combine trigonometrically to generate the sine and cosine values of the input phase;
wherein the predetermined space for in phase (I- channel) and quadrature phase (Q-channel) is partitioned into two smaller lookup tables for increasing the number of frequency spots for given resources of the frequency synthesizer.
8. The frequency synthesizer as claimed in claim 7, wherein the frequency step size is inversely proportional to the square of the look-up table size.
9. The frequency synthesizer as claimed in claim 7, wherein the look-up tables are equally partitioned for the fine and coarse part of the phase increment.

10. The frequency synthesizer as claimed in claim 7, wherein me accumulator is a feedback adder.
11. The frequency synmesizer as claimed in claim 7, wherein the first look up table stores the phase to amplitude conversion values for coarse phase increment for a complete cycle of the wave.
12. The frequency synthesizer as claimed in claim 7, wherein the second look-up table stores the values corresponding to fine phase increment between two phase - values of the first table.

Documents:

3053-DEL-2005-Abstract-(14-06-2012).pdf

3053-del-2005-abstract.pdf

3053-DEL-2005-Claims-(14-06-2012).pdf

3053-del-2005-claims.pdf

3053-DEL-2005-Correspondence Others-(14-06-2012).pdf

3053-del-2005-correspondence-others.pdf

3053-DEL-2005-Description (Complete)-(14-06-2012).pdf

3053-del-2005-description (complete).pdf

3053-DEL-2005-Drawings-(14-06-2012).pdf

3053-del-2005-drawings.pdf

3053-del-2005-form-1.pdf

3053-del-2005-form-2.pdf

3053-del-2005-form-26.pdf

3053-del-2005-form-3.pdf

3053-del-2005-form-5.pdf

3053-DEL-2005-GPA-(14-06-2012).pdf

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Patent Number

255375

Indian Patent Application Number

3053/DEL/2005

PG Journal Number

08/2013

Publication Date

22-Feb-2013

Grant Date

15-Feb-2013

Date of Filing

16-Nov-2005

Name of Patentee

DIRECTOR GENERAL, DEFENCE RESEARCH & DEVELOPMENT ORGANIZATION

Applicant Address

MINISTRY OF DEFENCE,GOVT OF INDIA WEST BLOCK-VII,WING 1,SEC-1 RK PURAM NEW DELHI-110 066

Inventors:

#	Inventor's Name	Inventor's Address
1	JASVINDER SINGH MANGAT	ELECTRONICS AND RADAR DEVELOPMENT ESTABLISHMENT,DRDO COMPLEX,C.V.RAMAN NAGAR,BANGALORE-560093 INDIA

PCT International Classification Number

H02M 3/315

PCT International Application Number

N/A

PCT International Filing date

PCT Conventions:

#	PCT Application Number	Date of Convention	Priority Country
1			NA