Title of Invention

A DISTORTION REDUCTION CIRCUIT

Abstract Techniques are disclosed for compensating for second-order distortion in a wireless communication device. In a zero-intermediate frequency (IF) or low-IF architecture, IM2 distortion generated by the mixer (20) results in undesirable distortion levels in the baseband output signal. A compensation circuit (104) provides a measure of the IM2 distortion current independent of the radio frequency (RF) pathway to generate an IM2 calibration current. The IM2 calibration current is combined with the baseband output signal to thereby eliminate the IM2 currents generated within the RF pathway. In one embodiment, the calibration is provided at the factory during final testing. In alternative embodiment, additional circuitry (156, 158) may be added to the wireless communication device to provide a pathway between the transmitter (150) and the receiver (146). The transmitter signal is provided to the receiver to permit automatic calibration of the unit. An internal signal source (162) may be used in place of the transmitter (150). The auto-calibration may be performed to eliminate IM2 distortion or permit optimization of the circuit to minimize other forms of distortion or interference. [fig- 2]
Full Text DISTORTION REDUCTION CALIBRATION
BACKGROUND
Field
[0001] The present invention is related generally to wireless communication
devices, and, more particularly, to a system and method for a distortion reduction calibration circuit in a wireless communication device.
Description of the 'Related Art
[0002] Wireless communication systems are proliferating as more and more
service providers add additional features and technical capabilities. A large number of
service providers now occupy a relatively limited portion of the radio frequency spectrum.
Due to this crowding, increased interference between wireless communication systems is
commonplace. For example, wireless communication systems from two different service
providers may occupy adjacent portions of the spectrum. In this situation, interference may
be likely.
[0003] One example of such interference occurs in a code division multiple access
(CDMA) wireless system. In one embodiment, a CDMA system occupies a portion of the
frequency spectrum adjacent to a portion of the frequency spectrum allocated to a
conventional cellular telephone system, sometimes referred to as an advanced mobile
phone system (AMPS).
[0004] Conventional CDMA units attempt to eliminate undesirable signals by
adding filters following the mixer stage. FIG 1 illustrates one known implementation of a
direct-to-baseband or low IF wireless system 10 in which a radio frequency (RF) stage 12
is coupled to an antenna 14. The output of the RF stage 12 is coupled to an amplifier 16,
which amplifies the radio frequency signals. It should be noted that the RF stage 12 and
the amplifier 16 may include conventional components such as amplifiers, filters, and the
like. The operation of these stages is well known and need not be described in greater
detail herein.
[0005] The output of the amplifier 16 is coupled to a splitter 18 that splits the
processed signal into two identical signals for additional processing by a mixer 20. The

mixer 20 comprises first and second mixer cores 22 and 24, respectively. The mixers 22 and 24 are identical in nature, but receive different local oscillator signals. The mixer core 22 receives a local oscillator signal, designated LOI, while the mixer core 24 receives a local oscillator signal, designated as LOQ. The local oscillator signals are 90° out of phase with respect to each other, thus forming a quadrature mixer core. The output of the mixer 20 is coupled to jammer rejection filter stage 26. Specifically, the output of the mixer core 22 is coupled to a jammer rejection filter 28 while the output of the mixer core 24 is coupled to a jammer rejection filter 30. The operation of the jammer rejection filters 28 and 30 is identical except for the quadrature phase relationship of signals from the mixer 20. The output of the jammer rejection filters 28 and 30 are the quadrature output signals lour and QOUT respectively.
[0006] The jammer rejection filters 28 and 38 are designed to remove unwanted
signals, such as signals from transmitters operating at frequencies near the frequency of operation of the system 10. Thus, the jammer rejection filters 28 and 30 are designed to remove "out-of-band" signals. In operation, the jammer rejection filters 28 and 30 may be lowpass filters, bandpass filters, or complex filters (e.g., a single filter with two inputs and two outputs), depending on the implementation of the system 10. The operation of the jammer rejection filters 28 and 30 are well known in the art and need not be described in greater detail herein. While the jammer rejection filters 28 and 30 may minimize the effects of out-of-band signals, there are other forms of interference for which the jammer rejection filters are ineffective.
[0007] For example, distortion products created by the mixer 20 may result in
interference that may not be removed by the jammer rejection filters 28 and 30. If one considers a single CDMA wireless unit, that unit is assigned a specific radio frequency or channel in the frequency spectrum. If an AMPS system is operating on multiple channels spaced apart from each other by a frequency Awy, then the second-order distortion from the mixer 20 will create a component at a frequency AcD/ in the output signal. It should be noted that the second order distortion from the mixer 20 will create signal components at the sum and difference of the two jammer frequencies. However, the signal resulting from the sum of the janmier fi-equencies is well beyond the operational frequency of the wireless device and thus does not cause interference. However, the difference signal, designated

herein as may well be inside the desired channel and thus cause significant interference with the desired signal.
[0008] In this circumstance, the AMPS signals are considered a jammer signals
since they create interference and therefore jam the desirable CDMA signal. Although the present example refers to AMPS signals as jammer signals, those skilled in the art will appreciate that any other radio firequency sources spaced at a frequency of Aco/ from each other may be considered a jammer.
[0009] If this second-order distortion signal is inside the chamiel bandwidth, the
jammer rejection filters 28 and 30 will be ineffective and the resultant interference may
cause an unacceptable loss of carrier-to-noise ratio. It should be noted that this
interference may occur regardless of the absolute frequencies of the janmier signals. Only
the frequency separation is important if the second-order distortion results in the
introduction of an undesirable signal into the channel bandwidth of the CDMA unit.
[0010] Industry standards exist that specify the level of higher order distortion that
is permitted in wireless communication systems. A common measurement technique used to measure linearity is referred to as an input-referenced intercept point (UP). The second order distortion, referred to as IIP2, indicates the intercept point at which the output power in the second order signal intercepts the first order signal. As is known in the art, the first order or primary response may be plotted on a graph as the power out (Pour) versus power in (PIN). In a linear system, the first order response is linear. That is, the first order power response has a 1:1 slope in a log-log plot. The power of a second order distortion product follows a 2:1 slope on a log-log plot. It follows that the extrapolation of the second order curve will intersect the extrapolation of the fundamental or linear plot. That point of intercept is referred to as the nP2. It is desirable that the IIP2 number be as large as possible. Specifications and industry standards for nP2 values may vary from one wireless communication system to another and may change over time. The specific value for IIP2 need not be discussed herein.
[0011] It should be noted that the second-order distortion discussed herein is a
more serious problem using the direct down-conversion architecture illustrated in FIG 1. In a conventional super-heterodyne receiver, the RF stage 12 is coupled to an intermediate firequency (IF) stage (not shown). The IF stage includes bandpass filters that readily remove the low frequency distortion products. Thus, second-order distortion is not a serious problem with a super-heterodyne receiver. Therefore, the IIP2 specification for a

super-heterodyne receiver is generally not difficult to achieve. However, with the direct
down-conversion receiver, such as illustrated in FIG 1, any filtering must be done at the
baseband frequency. Since the second-order distortion products at the frequency separation,
regardless of the absolute frequency of the jammers, the nP2 requirements are typically
very high for a direct-conversion receiver architecture. The IIP2 requirement is often the
single most difficult parameter to achieve in a direct down-conversion receiver architecture.
[0012] As noted above, the second-order distortion is often a result of non-
linearities in the mixer 20. There are a number of factors that lead to imbalances in the mixer 20, such as device mismatches (e.g., mismatches in the mixer cores 22 and 24), impedance of the local oscillators, and impedance mismatch. In addition, factors such as the duty cycle of the local oscillator also has a strong influence on the second-order distortion. Thus, the individual circuit components and unique combination of circuit components selected for a particular wireless communication device results in unpredictability in the IIP2 value for any given unit. Thus, calibration of individual units may be required to achieve the IIP2 specification.
[0013] Therefore, it can be appreciated that there is a significant need for a system
and method for wireless communication that reduces the undesirable distortion products to an acceptable level. The present invention provides this and other advantages as will be apparent from the following detailed description and accompanying figures.
SUMMARY
[0014] Novel techniques are disclosed for distortion reduction calibration. In an
exemplary embodiment, a distortion reduction circuit for use in a wireless communication device has a radio frequency (RF) receiver and comprises a gain stage having an input coupled to the receiver and an output with the gain stage controlling an amplitude of an output signal related to a second order nonlinear response within the receiver. An output coupling circuit couples the gains stage output to the receiver.
[0015] In one embodiment, the gain stage amplitude control is based on the
amplitude of the second order nonlinear response within the receiver. The signal related to the second order nonlinear response within the receiver may be inherently generated by circuitry within the receiver or may be generated by a squaring circuit coupled to the receiver.
T

[0016] When implemented with an RF receiver generating a down-converted
output signal, the output coupling circuit may comprise an adder having first and second inputs with the first input configured to receive the output signal from the receiver and the second input configured to receive the gain stage output signal. The gain stage may generate an output current related to the second order nonlinear response within the receiver. The output coupling circuit may be a direct connection to the down-converted output signal of the receiver.
[0017] In one embodiment, the circuit is for use in a factor calibration wherein the
receiver generates a down-converted output signal and is configured to receive an external input signal to permit the adjustment of the gain stage to thereby minimize the second order nonlinear response of the receiver output signal.
[0018] In another embodiment, an automatic calibration circuit may be used with
the wireless communication device wherein a signal source generates a test signal and a switch is selectively activated to couple the signal source to a receiver input terminal to couple the test signal to the receiver input terminal and thereby peimit distortion reduction adjustments on the receiver.
[0019] The switch circuit maybe selectively activated in an auto-calibration mode
or activated at predetermined times.
[0020] In one embodiment, the signal source comprises an internal signal
generator. The internal signal generator may generate the test signal having multiple frequency components having a predetermined spectral spacing. In another embodiment, the wireless communication device includes an RF transmitter and the circuit may further comprise a transmitter control to control an input signal to the transmitter and selectively activated during the auto-calibration process to generate the test signal. In one embodiment, the circuit may further include an attenuator coupled to a transmitter output terminal to generate an attenuated output signal as the test signal.
BRIEF DESCRIPTION OF THE DRAWINGS
[0021] no. 1 is a functional block diagram of a conventional wireless
communication receiver.
[0022] FIG 2 is a functional block diagram of a generic implementation of the
present invention.

[0023] FIG. 3 is a functional block diagram of a receiver mixer illustrating one
implementation of the present invention.
[0024] FIG 4 is a schematic diagram illustrating one possible implementation of
the present invention.
[0025] FIG 5 is a functional block diagram of an alternative implementation of the
present invention.
[0026] FIG 6 is a functional block diagram of another alternative implementation
of the present invention.
DETAILED DESCRIPTION
[0027] The present invention is directed to a calibration circuit and method that
simplifies the calibration process for individual wireless communication devices. The term "wireless communication device" includes, but is not limited to, cellular telephones, personal communication system (PCS) devices, radio telephones, mobile units, base stations, satellite receivers and the like. In one embodiment, the calibration circuit is used at assembly to compensate for variations in components. In an alternative embodiment, also described herein, an onboard calibration circuit can be used to compensate for component mismatch due to circuit aging or other changes in circuit operational parameters.
[0028] IIP2 performance presents a major challenge in direct conversion down-
converters. The required values of IIP2 are usually very high and the actual performance tends to be difficult to predict because it is almost exclusively determined by statistical phenomena. That is, component mismatch tends to be a statistical phenomena. Even so-called "matched" components on an integrated circuit are subject to variations in operating characteristics due to processing variations of an integrated circuit. Similarly, external components are also subject to variation that is unpredictable and cannot be readily accounted for in designing a radio frequency (RF) circuit.
[0029] There are some known techniques for suppressing IIP2 distortion, but these
processes tend to be complicated or introduce new spurs (i.e., undesirable frequency components) and require a change in frequency plan (Le., reallocation of the frequency spectrum). In addition, these known techniques interfere with the RF path and will

degrade other RF parameters such as noise figure and IIP3. As a result, these known
circuits lead to more complicated circuitry, increased cost, and decreased performance.
[0030] In contrast, the present invention uses a feed-forward technique, which
relies on a one-time calibration at the phone level. The circuitry of the present invention is
designed such that it does not interfere with the RF path, and the RF path can therefore be
optimized for other RF performance parameters {e.g., noise figure and IIP3),
independently of IIP2. All of the calibration works at baseband frequencies, which
facilitates the design and layout and enables lower power consumption.
[0031] As previously discussed, the second order nonlinear distortion is a
significant problem in direct conversion receiver architectures zero IF or low IF architectures). While heterodyne receiver architectures also generate second order distortion, other conventional techniques may be used to reduce the unwanted nonlinear distortion. For example, careful selection of the DP frquency followed by IF filtering may typically reduce the second order nonlinear distortion to an acceptable level in heterodyne receivers. While the discussion herein uses low IF or zero IF examples, the principles of the present invention may be applied to other receiver architectures, including heterodyne receivers.
[0032] Furthermore, the description presented herein may refer to a baseband
signal, resulting from a low IF or zero IF mixing. However the principles of the present invention apply generally to a down-converted signal that is generated by a mixer. Therefore, the present invention is not limited by the receiver architecture, but can generally be applied to any down-converted signal having a second order nonlinear distortion.
[0033] The present invention is embodied in a system 100, which is shown in an
exemplary form in the functional block diagram of FIG 2. The system 100 processes an RFin signal, which is illustrated in FIG. 2 in the form of a voltage (VRF). The RFin signal is processed by a conventional RF block 102. The RF block may include amplifiers, filters, and the like. In addition, the RF block typically includes a mixer, such as the mixer 20 illustrated in FIG 1 to convert the RF signal to a baseband signal. As illustrated in FIG. 2, the baseband signal comprises components that are identified as iBBdesired + ^MI- This is intended to represent the desired baseband signal combined with the undesirable signal resulting from second order distortion within the RF block 102.
^

[0034] The system 100 also includes a compensation branch 104, which comprises
a squaring circuit 106, lowpass filter 108, and variable gain amplifier (VGA) 110. The squaring circuit 106 provides a squared version of the voltage VRF. AS those skilled in the art will appreciate, the squaring circuit produces a number of undesirable harmonics at multiple ftequencies. The low pass filter 108 is designed to eliminate the undesirable frequencies so that the compensation branch 104 does not produce undesirable interference. The VGA 110 is used to attenuate or amplify a compensation signal identified in FIG 2 as I'lxccai- The compensation signal iiMZcai is combined with the output of the RF block by an adder 114. The output of the adder 114 is the desired signal loutBB-If the compensation current iiM2cai equals the undesirable signal component IIM2, the output signal I'outBB equals the desired signal iBBdesired-
[0035] As illustrated in FIG. 2, the IM2 calibration scheme relies on canceling the
IM2 output current generated by the RF block 102 with a progranmiable IM2 current derived from another source. In the present example, the programmable compensation current is derived directly from the RF signal, but does not interact with the RF pathway in the RF block 102. Thus, the advantage of this technique is that it does not interfere with the RF path. Therefore, the introduction of IM2 calibration will not degrade other RF parameters such as gain, noise figure and DPS.
[0036] For proper cancellation of the undesirable signal by the adder 114, the two
IM2 currents must either be in-phase or 180 degrees out of phase. Due to the mechanism generating IM2, this is expected to be the case and will be derived below. As noted above, the RF block 102 contains conventional components, such as the mixer 20 (see FIG 1). The IM2 current generated by the mixer 20 can be expressed in the form:
[0037] Expressing VRF in polar form and taking into account that it may be
attenuated by some factor and phase-shifted by some phase through the naixer circuitry, we obtain:
and expanding this yields

[0038] A portion of the signal represented by equation (3) is dependent on a value
2CORF. This portion of equation (3) is of little concern in this analysis since it is very high frequency and will be filtered away using conventional techniques. However, the low-frequency part could land inside the desired baseband channel. So the IM2 product of interest from equation (3) is
Similarly, the IM2 compensation current generated at the output of the VGA 110 in FIG 2 is given by
where Ocai is a programmable scaling factor. Cancellation of IM2 by the adder 114 is achieved when
Thus, IM2 cancellation should be possible independently of the RP phase shift through the mixer.
[0039] In a typical implementation of the RF block 102, the mixer cores are the
main IM2 contributors. Therefore, to improve tracking between the IM2 source {i.e., the mixer core) and the IM2 calibration signal, it would be desirable to derive the IM2 calibration signal from the mixer cores themselves. This is fortunately straight-forward, because the emitter-nodes of the mixer core present a strong second-order non-linearity. Conceptually, the IM2 calibration circuit can be implemented as shown in the functional block diagram of FIG. 3. For the sake of clarity, FIG 3 illustrates only a single mixer core {i.e., either the I mixer or the Q mixer core). Those skilled in the art will recognize that an additional mixer core and calibration circuit are implemented in accordance with the description provided herein. It should also be noted that the simplified functional block diagram of FIG. 2 represents a single ended system while the functional block diagram of


FIG 3 is a differential implementation with differential inputs and differential outputs. Those skilled in the art will recognize that the principles of the present invention may be applied to single ended or differential systems.
[0040] The RF block 102 comprises a transconductor 120, which receives the input
signal RFin in the form of a differential voltage and generates diJBFerential output signals that are coupled to the inputs of a mixer core 122 through a series combination of a resistor R and a capacitor C. The output of the transconductor 120 illustrated in dashed lines are inputs to the other mixer core (not shown). The resistor R and capacitor C serve as current dividers to provide current to the mixer core 122 and the other mixer (not shown). The input currents to the mixer core 122 are identified in FIG 3 as /RFI and /RFZ, respectively. It should be noted that the series RC Circuit is not essential to the successful operation of the present invention. Rather, the RC circuit is merely one implementation of the splitter 18 (see FIG 1). The present invention is not limited by the specific implementation of the splitter 18. The mixer core 122 also receives a differential local oscillator (LO) as an input and generates a differential baseband output signal (BB OUT).
[0041] The mixer core 122 is shown in FIG 3 using conventional symbols for
schematic diagram. The mixer core may be implemented by a transistor circuit shown at the bottom of FIG 3 using cross-coupled transistors in a known configuration for a differential mixer. The emitters of the various transistors in FIG 3 are coupled together to form first and second input nodes that receive the RF signal. The input nodes are biased by bias current sources h in a known manner. In an altranative embodiment, the transconductor 120 may supply sufficient bias current thus enabling the elimination of the bias current sources /B.
[0042] The transistor arrangement of the mixer core 122 illustrated in HG. 3
comprises first and second pairs of transistors whose emitters are coupled together to form the input nodes of the mixer core 122. The input nodes of the mixer core 122 are driven by the currents /RFI and /RF2, respectively. Also illustrated at the input nodes of the mixer core 122 in FIG 3 are voltages VEI and Vta, respectively. As those skilled in the art can appreciate, the non-linear operation of the transistors result in a second order non-linearity of the input signal which is present at the input nodes of the mixer core 122. This non¬linear component is represented by the voltage VEI and VE2 at the input nodes of the mixer core 122. In the embodiment illustrated in FIG 3, there is no need for an external squaring circuit, such as the squaring circuit 106 illustrated in HG 2. Rather, the system 100 relies
//

on the second order nonlinear signal inherently generated within the mixer core 122. The current /RFI and /RF2 may be thought of as inputs to a squaring circuit (e.g., the squaring circuit 106 of HG. 2) while the voltage VEI and may be considered as outputs of the squaring circuit. The advantage of the implementation in HG 3 is that the squaring function is an inherent byproduct of the mixer core 122 and requires no additional circuitry (e.g., the squaring curcuit 106) to generate the squared term used by the compensation branch 104. A further advantage of the implementation illustrated in HG 3 is that the squared signal is generated by the mixer core 122 itself, which is also the source of the nonlinearity within the mixer core that results in the undesirable IM2 signal (represented in HG 2 as iftc)- Thus, the compensation current generated by the compensation branch 104 in HG 3 advantageously tracks the nonlinear signal generated within the mixer core 122. Other components within the RF block 102 may be also serve as the source of the second order nonlinear signal. For example, the transconductor 120 may generate the second order nonlinear signal.
[0043] HG 3 also illustrates an implementation of the compensation branch 104.
Coupling resistors couple the RF currents /RFI and /RP2 to a gain stage 126. The output of
the gain stage 126 is coupled to a variable attenuator 128 which generates calibration
currents /jMacan and /iM2cai2-
[0044] The calibration current can be written as:
'lM2cal = ■^IM2call" •^IM2cal2 = «' Unocal" VE = «• ^mcal * ^2core ' -^RF 0)
which is of the desired form.
[0045] Using the emitter node of the mixer core 122 as the IM2 source for the
calibration is desirable because, from a simplified point of view, the IM2 generated by the
mixer cores can be explained as the strong IM2 signal present on the emitter node leaking
unequally to the two outputs due to mismatches in the transistors used to implement the
mixer core. If no mismatch were present, the mixer core would not generate any
differential IM2 because the emitter IM2 would leak equally to both sides. Thus, it would
be expected that the output IM2 tracks the emitter IM2 (i.e., the output IM2 would be
given as a mismatch factor times the emitter IM2).
[0046] In the absence of temperature dependencies, the calibration current
characterized in equation (7) above would provide a suitable correction current to
/a

eliminate IM2 generated by the mixer cores. Unfortunately, simulations show that this mismatch factor is temperature dependent, and the dependency depends on the type of mismatch (e.g., emitter resistance mismatch gives a different temperature profile than base-emitter capacitance mismatch, etc.). In practice, one type of mismatch will typically dominate so that the temperature dependence is repeatable. Therefore, it is desirable to let the a factor have a programmable temperature dependence. "Dius, the term a in equation (7) may be altered to include the following characteristic:

r

.

(8)

where oCcai and Pcai are programmable constants, T is temperature and Tb is the temperature at which calibration is performed.
[0047] The abbreviated schematic of HG. 4 illustrates a circuit that implements the
desired calibration function. It uses a current steering DAC to set the calibration factor
and currents IA and IB to set the temperature dependence. The circuit works as follows:
[0048] Firstly, we rewrite the various currents in terms of IA, h, Inf, and /jy?:
)

Observing that U = 0.5 • (7B - I/D, we additionally have:
and similarly




(11)

Using the translinear principle, in which certain products of currents may be equated to other products of currents, we find that:
and with the definitions provided by equations (9) and the translinear equations (12), equations (10) and (11) reduce to;
13)
from which we see
(14)
and thus
[0049] Hence, the IM2 compensation current is given as

(15)
[0050] The desired temperature variation can be implemented by letting the current
be a bandgap-referenced current, and the current h be a combination of bandgap and proportional to absolute temperature (PTAT):


[0051] This can be done very easily using programmable current mirrors, and we
then obtain the desired function.





[0052] It should be noted that the form of equation (17) is similar to that of
equation (8) above. Thus, FIG 4 provides a circuit implementation of the compensation
branch 104. It should be noted that the gain stage 126 has differential inputs. One input is
coupled, via two resistors, to the RF inputs of the mixer core 122 (see FIG 3). Due to the
switching currents of the transistors in the mixing core 122, the signal provided to the
input of the gain stage via the resistors contains both AC and DC components. The signal
is provided as a second input to the gain stage 126. The voltage has a value
equivalent to the DC component of the signal provided from the mixer core 122. This
effectively cancels out the DC component and allows the gain stage 126 to amplify the AC
signal only. The voltage be generated using another mixer with no RF input and
using the same local oscillator (LO) input. The transistors of the mixer (not shown) are
matched to the transistors of the mixer core 122 such that the DC signal produced by the
mixer core (not shown) matches the DC component generated by the mixer core 122.
[0053] Due to the circuit topology, we must ensure that IB > h- The current h
current must be set large enough to ensure this. This is done through the CB current mirror ratio described above,
[0054] As previously discussed, component mismatch in the mixer core 122 (see
FIG 3) is a significant cause of IM2 distortion. Another cause of IM2 distortion that should be considered is RF-to-LO coupling within the mixer core 122. Due to mismatch in device capacitances etc. an attenuated version of the RF signal may get coupled to the LO port. This signal will be proportional to the incoming RF current ij^pit) and may be phase shifted by an amount.
[0055] On the LO port we may then have a signal component of the form.


where /(f) and are a polar representation of [0056] The mixer core 122 will generate a mixing product between the RF signal
on the LO port and the incoming RF current. Thus we obtain a signal component at the mixer output as follows:
where is the conversion gain of the mixer core. Expanding the above expression yields:
[0057] As with the previous analysis, the high frequency component of equation
(20) is easily removed with conventional filtering techniques and need not be considered further. However, it is necessary to consider the low-frequency part of equation (20), which may be represented as follows:
[0058] As is apparent, auak is a constant. Thus, the IM2 caused by RF-to-LO
leakage can also be corrected by the described calibration method. It is still advisable, however, to avoid RF-to-LO leakage. This can most effectively be done by ensuring low source impedance on the LO port at RF frequencies, (e.g., by using emitter-followers to drive the mixer LO port).
[0059] Since the IM2 is statistical in nature because of the variation in components
and manufacturing processes, each wireless communication device will require unique calibration current values. In one implementation, the compensation branch 104 is adjusted as part of a final assembly process in a factory test. The process described above provides sufficient correction for the IM2 current in the wireless communication device.


[0060] In an alternative embodiment, the wireless communication device may
include additional circuitry to provide self-contained auto-calibration. The auto-calibration process can be automatically performed by the wireless device at regular intervals. An auto-calibration circuit is illustrated in the functional block diagram of HG 5. The functional block diagram of HG 5 comprises an antenna 140 and a duplexer 142. Those skilled in the art will appreciate that the duplexer 142 allows a common antenna to be used for both transmission and reception of RF signals. The output of the duplexer 142 is coupled to a low-noise amplifier (LNA) 144. The output of the LNA144 is coupled to a receiver 146. Those skilled in the art will appreciate that the receiver 146 generically describes all circuitry involved with the processing of received signals. This includes the RF block 102 and its associated components.
[0061] The output of the receiver 146 is coupled to a mobile station modem
(MSM) 148. The MSM 148 generically represents circuitry used for signal processing of the baseband signal. The MSM also processes baseband data for transmission. Accordingly, the MSM 148 is also coupled to a transmitter 150. The transmitter 150 is intended to encompass all circuitry involved in the modulation of baseband signals to the appropriate RF signals. The output of the transmitter 150 is coupled to a power amplifier (PA) 152. The PA 152 drives the antenna 140 via the duplexer 142 to transmit the RF signals. The operation of circuit components, such as the MSM 148 and transmitter 150 are well known in the art and need not be described in greater detail herein. The receiver 146 is also a conventional component with the exception of the added circuitry of the compensation branch 104 (see FIG 2).
[0062] Because CDMA is a full-duplex system, the transmitter 150 can be on at the
same time as the receiver 146. The present invention takes advantage of this capability by using the transmitter 150 to generate a test signal on which to perform IM2 calibration. The simplified architecture illustrated in FIG 5 takes advantage of the fact that IM2 distortion does not depend on the absolute firequencies of the signals, but only on their frequency separation. With the PA 152 and LNA 144 turned off, the transmitter 150 can generate a signal that is routed straight to the receiver 146 via semiconductor switches 156 and 158. The output signal firom the transmitter 150 is attenuated through a resistive attenuator 160.
[0063] The receiver 146 processes the received signal and the IM2 distortion
caused by the receiver results in baseband distortion product. The MSM 148 can detect


and minimize the distortion product by adjusting the IM2 calibration. Those skilled in the
art will recognize that the calibration circuit of FIG 5 may be used with any form of
compensation circuit. Thus, the auto-calibration circuit is not limited to the compensation
techniques described above. For example, the auto-calibration circuit of FIG 5 could be
used to compensate for the noise figure, circuit gain, linearity, IM3 signals as well as IM2
signals. In addition, the auto-calibration circuit of FIG 5 may be used for different forms
of IM2 compensation other than the circuit described above with respect to FIGS. 2-4.
Thus, the present invention is not limited by the specific form of compensation circuit.
[0064] The main signal generated by the transmitter 150 falls far into the stop-band
of the baseband filter (not shown) and does therefore not contribute any power at baseband. Consequently, the only power detected by the MSM 148 is the IM2 distortion product and circuit noise. Thus, the MSM 148 can perform the IM2 calibration based On a simple power measurement.
[0065] In an altemative embodiment, illustrated in FIG 6, an internal signal source
162 within the receiver generates the desired test signal. In an exemplary embodiment, the
signal source 162 generates a signal having at least two frequency components that are
spaced apart by a predetermined frequency. As previously discussed, the wireless receiver
may be sensitive to signals that are separated by a frequency of Acoy.
[0066] The signal source 162 is coupled to the input of the receiver 146 by a
switch 164. The switch 164 is activated only when the system 100 is placed in an auto-
calibration mode. The auto-calibration can be performed at predetermined times, such as
when the power is first applied to the wireless communication device. Alternatively, the
auto-calibration can be performed periodically at predetermined time intervals.
[0067] It is to be understood that even though various embodiments and
advantages of the present invention have been set forth in the foregoing description, the above disclosure is illustrative only, and changes may be made in detail, yet remain within the broad principles of the invention. Therefore, the present invention is to be limited only by the appended claims.


WE CLAIM :
1. A distortion reduction circuit comprising a receiver (146) and a compensation
branch (104) for reducing second order non-linear distortion in the receiver
(146) caused by jammers during direct down conversion of a received RF
signal by the receiver (146), the compensation branch (104) being adapted to
be coupled to the receiver (104) to reproduce the second order nonlinear
distortion in the receiver (104) and comprising :
a squaring circuit for receiving the received RF signal and generating a squared version of the received RF signal;
a gain stage (126) for receiving the squared version of the received RF signal and generating the reproduced second order nonlinear distortion; and
an output coupling circuit for coupling the reproduced second order nonlinear distortion to an output of the receiver (146) to generate a down-converted baseband signal characterized with reduced second order nonlinear distortion.
2. The circuit as claimed in claim 1, wherein the receiver comprises a mixer, and wherein the output coupling circuit couples the reproduced second order nonlinear distortion to an output of the mixer (122).
3. The circuit as claimed in claim 1, wherein the receiver (146) is a Zero-IF direct down conversion receiver (146).
4. The circuit as claimed in claim 1, wherein the receiver (146) is a low IF direct down conversion receiver (146).
5. The circuit as claimed in claim 1, wherein the output coupling circuit is an adder (114).
19

The circuit as claimed in any of claims 1 to 5, wherein the receiver (146) comprises a mixer (122), wherein the squaring circuit is part of the mixer (122), and wherein the gain stage (126) is adapted to receive the squared version of the received RF signal from the mixer (122).
The circuit as claimed in claim 2, wherein the squaring circuit is part of the mixer (122), and wherein the gain stage (126) is adapted to receive the squared version of the received RF signal from the mixer.
The circuit as claimed in any of claims 1, 6 or 7 wherein the receiver (146) defines a receiver path and the compensation branch (104) operates to provide feed forward second-order non-linear distortion reduction to the receiver path.
The Circuit as claimed in claim 8 wherein the non-linear distortion elimination does not introduce other non-linear distortion in the receiver path.
The circuit as claimed in any of claims 1, 3 or 4, comprising means for adjusting the gain stage (126) to permit calibration thereof
The circuit as claimed in claim 10, wherein the means for adjusting is adapted to enable factory calibration of a mobile device including the circuit and the receiver (146).
The circuit as claimed in claim 10, wherein the means for adjusting comprises circuitry for providing self-contained auto-calibration.
The circuit as claimed in any of claims 1, 3 or 4 wherein the circuit and receiver (146) are on a single integrated circuit.
20

The circuit as claimed in claim 13, wherein the integrated circuit is adapted to be coupled to a mobile station modem (MSM) for signal processing of the dowij-converted baseband signal.
The circuit as claimed in claim 14, wherein the integrated circuit and MSM are further adapted to be used with a transmitter (150), the integrated circuit being responsive to a test signal generated under MSM control to provide calibration.
The circuit as claimed in claim 6, wherein the mixer is adapted to generate the squared version of the received RF signal is internally generated.
The circuit as claimed in claim 6, wherein the mixer comprises cross-coupled transistors, wherein the mixer is adapted to generate the squared version of the received RF signal intemally at emitters of the transistors, and wherein the reproduced second order nonlinear distortion is coupled to collectors of the transistors.
The circuit as claimed in claim 1, wherein the gain stage is adapted to generate the reproduced second order nonlinear distortion with a variable gain.
The circuit as claimed in claim 18, wherein the variable gain is temperature dependent.
The circuit as claimed in claim 1, wherein the gain stage comprises a digital-to-analog converter (DAC) adapted to provide a programmable gain for the reproduced second order nonlinear distortion.
A method operating on a circuit adapted to be coupled to a receiver (146) in a feed forward manner to remove unwanted second order nonlinear distortion in the receiver (146) caused by jammers, said method comprising:
21

generating a squared version of a received RF signal;
reproducing, by the circuit, the unwanted second order nonlinear distortion based on the squared version of the received RF signal; and
subtracting, using a feed forward technique, the unwanted second order nonlinear distortion from an output of the receiver (146) to generate a down-converted baseband signal characterized with reduced second order nonlinear distortion.
The method as claimed in claim 21, comprising calibrating a gain stage (126) used for reproducing the unwanted second order nonlinear distortion.


Documents:

1678-CHENP-2004 CORRESPONDENCE OTHERS 21-06-2011.pdf

1678-chenp-2004 correspondence others.pdf

1678-chenp-2004 correspondence po.pdf

1678-CHENP-2004 CORRESPONDENCE OTHERS 23-02-2011.pdf

1678-chenp-2004 description(complete).pdf

1678-chenp-2004 drawings.pdf

1678-chenp-2004 form-1.pdf

1678-chenp-2004 form-2.pdf

1678-chenp-2004 form-3.pdf

1678-chenp-2004 pct.pdf

1678-chenp-2004 petitions.pdf

1678-chenp-2004 power of attorney.pdf

1678-chenp-2004 abstract.pdf

1678-chenp-2004 claims.pdf

1678-chenp-2004 form-13.pdf

1678-chenp-2004 form-18.pdf

1678-chenp-2004 form-5.pdf

abs chenp-2004 abstract.jpg


Patent Number 248174
Indian Patent Application Number 1678/CHENP/2004
PG Journal Number 26/2011
Publication Date 01-Jul-2011
Grant Date 24-Jun-2011
Date of Filing 29-Jul-2004
Name of Patentee QUALCOMM INCORPORATED
Applicant Address 5775 MOREHOUSE DRIVE, SAN DIEGO, CALIFORNIA 92121-1714
Inventors:
# Inventor's Name Inventor's Address
1 SHAH, PETER, JIVAN 3548 ALABAMA STREET, SAN DIEGO, CALIFORNIA 92104
PCT International Classification Number H04B1/40
PCT International Application Number PCT/US03/03429
PCT International Filing date 2003-02-03
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 10/066,115 2002-02-01 U.S.A.