Title of Invention

POWER SEMICONDUCTOR MODULE WITH CONDUCTING ELEMENT

Abstract The invention describes a power semiconductor module with housing, load connection elements and multiple identical types of chips inside the housing. These have metallic connecting tracks of different polarity and power semiconductor component arranged on these. Above and a distance from the chips minimum one conducting element is arranged, which connects a load connection element and a connecting track of minimum one chip of the identical polarity not located immediately next to this load connection, wherein in case of multiple conducting elements, these are arranged immediately next to each other. Alternatively, in case of chips arranged in series and connecting track arranged on these along the longitudinal axis of the series, these connecting track of positive and negative polarity in case of consecutive chips are arranged in alternating fashion and at least two conducting element connect connecting tracks each time of identical polarity of chips.
Full Text FORM 2
THE PATENT ACT 1970 (39 of 1970)
&
The Patents Rules, 2003 COMPLETE SPECIFICATION
(See Section 10, and rule 13)
1. TITLE OF INVENTION
POWER SEMICONDUCTOR MODULE WITH CONDUCTING ELEMENT
2. APPLICANT(S)
a) Name : SEMIKRON ELEKTRONIK GMBH & CO. KG
b) Nationality : GERMAN Company
c) Address : POSTFACH 820251,
90253 NURNBERG, GERMANY
3. PREAMBLE TO THE DESCRIPTION
The following specification particularly describes the invention and the manner in which it is to be performed :

The invention describes a power semiconductor module consisting of housing preferably with a base plate for assembly on a heat sink and of at least one chip arranged in it and electrically insulated. The chip on its part consists of an insulator with multiple connecting tracks on it having mutual metallic insulation and power semiconductor components located on these and connected with these connecting tracks in appropriate circuit. Further, the power semiconductor module has connecting elements for external load and auxiliary contacts and also connecting elements for connections in the inside of the power semiconductor module.
Power semiconductor modules, which are the basis of this invention, are known from examples from the DE 103 16 356 A1 and DE 103 33 329 A1. These documents reveal respective power semiconductor modules in form of a half bridge circuit arrangement with a first and a second power switch. Each of these power switches is built-up as a parallel circuit of power transistors with allocated respective recovery diode. One each of first and a second transistor with allocated power diode is arranged herein on a separate chip. The chips are built-up in the identical manner, which means these have a basically identical pattern of conductor tracks. The differences are exclusively in aux. connecting tracks, for example for sensors, which are not provided on every chip.
According to the documents denoted as state of technology the chips of these kinds of power semiconductor modules are built-up as insulating chips consisting of an insulator as base material and for electrical insulation for a base plate or a heat sink. This insulator consists - as per state of technology - of an industrial ceramic for example, aluminum oxide or aluminum nitrite. On this insulator, on its main surface facing the inside of the power semiconductor module there are multiple metallic connecting tracks mutually, electrically insulated. In turn, on these are also the power semiconductor components are arranged.
Mostly the insulator has on its second main surface opposing the inside of the power semiconductor module similarly a metallic layer of the same material and thickness
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like that of the connecting tracks on the first main surface. Normally this layer, however, is not structured in itself, since it serves, for example, as solder joint for a base plate. The connecting tracks as well as the metallic layer of the second main surface consist preferably of copper applied as per DCB (direct copper bonding), wherein the copper has a typical thickness of less than 1 mm.
Further, the said power semiconductor modules as per state of technology have load connection elements, wherein these are respectively arranged in the area of shorter outer side of the housing. These load connection elements for both the DC connections and for the AC connection are designed as band type metallic molded components. The load connection elements connect external contacts with allocated connecting tracks on the first load connection element of the neighboring chip. The connecting tracks of the identical polarity of individual chips among themselves are built-up by means of individual connecting elements.
Modern power semiconductor components, especially power transistors, increasingly have a higher current carrying capacity per area. Thus, with the given dimensions of a power semiconductor module, whose total output - scaled directly with the current carrying capacity of the power switch - can be increased through the use of power semiconductor components of the same size and higher current carrying capacity. Since, as described above, the connecting tracks of the same polarity of individual chips are connected with each other within the power semiconductor module, the current for all individual chips flows already through that particular chip, which is connected with the load connection element. Thus the current carrying capacity of the connecting tracks proves itself to be the limiting factor for the output capacity of that kind of power semiconductor modules.
Further, disadvantage of power semiconductor modules according to the said state of technology is that the connecting tracks of positive and negative polarity are not arranged directly next to each other due to the maximum space saving overall arrangement, but between these the AC connecting track is arranged. This
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arrangement goes in to switching operation with disadvantageous parasitic inductivities.
The task forming the basis of the invention is to further develop a power semiconductor module with a multiple identical type chips or chip sections, wherein the output capacity with the given design of chips is increased and during this the current carrying capacity of the feeding lines to the individual chips - while the unchanged base area remains unchanged - is increased and / or the parasitic inductivities in the power semiconductor module are reduced.
The task on the basis of invention is resolved through the measures according to the characteristics of the claims 1 and 2. Preferred design forms are described in the subclaims.
The thought of the invention originates from a power semiconductor module preferably with a base plate for assembly on a heat sink. This power semiconductor module has minimum following components: housing, connecting elements for load connections and aux. connections, several identical types of chips or chip sections each of which with connecting tracks and minimum one power semiconductor component per chip or chip section.
The connecting elements for load connections lead preferably in the area of respective shorter outer side of the housing and serves for electrical connection of power switch arranged in the inside of housing. The chips or chip sections built-up as electrically insulating base plate or heat sink consist in turn individually of insulator, preferably industrial ceramic, and hereupon multiple metallic connecting tracks mutually electrically insulated and located on the first main surface on the opposite side of the base plate or the heat sink. On these connecting tracks the power semiconductor components are arranged and connected in appropriate circuit.
Above and at a distance from the chips or chip sections minimum one conducting
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element is arranged, which is connected with a load connection element and a connecting track of at least one chip or chip section of the identical polarity not located immediately next to this load connection. Preferably several conducting elements of this kind are provided, preferred for the connection of negative and positive polarity, wherein these conducting elements are then arranged closely next to each other.
In an arrangement of identical types of chips or chip sections in series and in connecting tracks arranged on these, which are provided along the lengthwise axis of the series arrangement, it is preferred, if the connecting tracks of the positive and negative polarity are arranged alternate in case of consecutive chips or chip sections and minimum two conducting elements connect the connecting tracks of identical polarity of chips or chip sections.
The invention based thought is explained in more details on the basis of design examples of Fig. 1 to 7.
Fig. 1 and 2 show a power semiconductor module according to the state of technology.
Fig. 3 and 4 show a first design of an invention based power semiconductor module.
Fig. 5 shows a second design of an invention based power semiconductor module.
Fig. 6 shows a third design of an invention based power semiconductor module.
Fig. 7 shows a 3-D representation of another invention based power semiconductor module.
Fig. 1 and 2 show a power semiconductor module (1) in half bridge circuit arrangement according to the state of technology as it is the starting point of the
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invention. Fig. 1 shows the plane view and Fig. 2 a longitudinal section along the line A-A of Fig. 1. The power semiconductor module (1) has a base plate (2), on which the frame type housing (3) and two chips (5) are arranged. Each chip (5) consists of an insulator (54) and metallic laminations, which are arranged on both the main surfaces. The metallic lamination (53) facing the base plate (2) is built-up as flat surface and is not structured. By means of a solder joint between this lamination (53) and the base plate (2) these are fixed to each other. As against this, the lamination facing the inside of the power semiconductor module is in itself structured and thus builds-up the connecting tracks (52 a/b/c) of the chip (5).
On these connecting tracks (52 a/c) the power semiconductor components (80) are arranged. The electrical connecting elements form the power connections (42) and the aux. connections not explicitly represented. The appropriate circuit connection of power semiconductor components (80) with the connecting tracks (52 b/c) is built-up as bonded connection (46).
The connecting elements (42) of the power connections are formed by metallic insulators, which have a soldered butt joint on its one end with the allocated connecting track (52 a/b/c) of the immediately next chip (5) and at its another end have a cavity for a screwed connection.
Each chip (5) has one each connecting track (52 a/b) running in direction of longitudinal axis of the power semiconductor module (1) for power connections of positive and negative polarity as well as connecting track (52 c) carry AC current, wherein these are arranged in the center line between both the connecting tracks (52 a/b) of the DC current. This is to be arranged advantageously around maximum dimensioned power semiconductor component (80) on the smallest possible base surface. Further, connecting tracks (52) for control and aux. connections are arranged on the chip (5). On each chip (5) a first and a second power transistor each with anti-parallel switched recovery diode are arranged. The majority of first and second power transistors in parallel circuit on majority of chips (5) thus builds-up both the
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power switches of the half bridge circuit. For this purpose the connecting tracks (54) of power connections are connected by means of solder connectors (44) with each other as electrically conducting.
Fig. 3 and 4 show a further developed power semiconductor module (1) based on the invention. Herein the solder connectors (44), according to Fig. 1 or 2 of DC connecting tracks are replaced through conducting elements (60). These conducting elements (60) are arranged above and at a distance from the chips (5). The solder connectors of the connecting tracks (52 c) of AC continue to correspond with the state of technology, could, however, be replaced similarly through a third connecting element.
Fig. 3 shows the process of two conducting elements (60), one each for both the DC connections of the power semiconductor module (1), wherein these conducting elements (60) are built-up herein as one metal molded part analogue to the power connection elements (40, 42). With the power connection elements (40) the conducting elements (60) are connected preferably by means of a solder joint. The connection to the connecting tracks (52 a/b) of chips (5) follows similarly by means of solder joint at the connecting points (62). The conducting elements (60) takeover the current proportion for the second and third chip (5) and thus relieve the connecting track (52 a/b) on the first chip (5) from carrying these currents. This is advantageous especially for the connecting track (54) of negative polarity, because it does not carry any power semiconductor components (80) and thus has a smaller cross section in comparison to the other load current carrying connecting tracks. Both the conducting elements (60) are arranged close to each other and parallel in the major portion of their flow pattern, whereby the parasitic inductivities of the power semiconductor module (1) are clearly reduced.
In the section view according to Fig. 4 it is represented that the respective connecting element (60) is connected with the load connection element (40) and also with the allocated connecting track (52) of the chip (5) by means of a solder joint. Further, the
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flow pattern above the chip level has been represented. Due to this pattern of a conducting element (60) parallel to the chip (5), wherein also the respective main surfaces of the chip and the conducting element run parallel to each other, the use of this invention based further development can be deployed also in power semiconductor modules (1) of lower installation height.
Fig. 5 shows another design of invention based power semiconductor module (1). In this case, as compared to Fig. 4 the joining of the connecting element (60) to the load connection elements (40) and to the allocated connecting track (52) of the chip (5) is different. For both the connections besides solder joint represented in Fig. 4 there are more connecting methods as represented here. Especially preferred here are bonded joints (66) and / or pressure contacted elastic connections by means of spring elements (64).
For these kinds of connections also other designs of the conducting element (70) are preferred. For example, here the design as DCB element is suitable. That kind of a connection with an insulator (76) and conducting tracks (72) arranged on it corresponds to the technology of chips (5). Herein, for all polarities conducting tracks (72) with the same cross section can be provided. Similarly, in this kind of design also both sides of the insulator (76) can be used for current carrying. This increases on the one hand the cross section surface available for current carrying and leads at the same time to current carrying in close vicinity, which serves the purpose of low inductive designing of the power semiconductor module (1).
Fig. 6 shows a third design of an invention based power semiconductor module (1). Represented here is again a half bridge circuit arrangement, wherein for reasons of simplification the power semiconductor components are not represented here. In this design of three identical types of chips (5) these are arranged in series. These can be individual chips (5) or as it is already apparent in the above design examples these can be so-called chip sections. Identical types of chip sections should mean analogically single chips, wherein individual topologies of connecting tracks repeat
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regularly on an insulator (54) and thus form an identical topology from circuit designing point of view, like it would be possible to achieve through individual chips.
Like, also according to Fig. 3 here the individual connecting tracks (52 a/b/c) are aligned along the longitudinal axis of chips (5) arranged in series. In contrast to Fig. 3, however, here the position of connecting tracks (52 a/b) alternates from chip to the next chip with respect to this longitudinal axis. Thus on the first chip it is the sequence of positive polarity seen from top to bottom, AC current and negative polarity in the reverse order for the second chip. This alternating arrangement is maintained for all chips (5). According to the invention, schematically represented connecting elements (70) are arranged here, which connect the respective connecting tracks (52 a/b) of the same polarity of chips (5) or chip section with each other. Here these conducting elements (70) must cross in their flow pattern between the contact points on the respective chips.
It is further preferred, if the power elements (70), as described above, are connected with the respective allocated load connection element (40). Further, the design of conducting elements (70) as insulator (76) with double sided conductor tracks (72) is especially preferred vis-a-vis the design as metallic molded component. Similarly, it is preferred that the design of connecting elements as a chip with multiple conductor tracks (72), which particularly simplifies the crossing of individual current paths, because in this case conductor track sections, for example, are connected by means of through hole contacts (74) by the insulator (76) and thus build up the conductor track (72).
The design form represented here is particularly advantageous with respect to avoiding parasitic inductivities, since magnetic fields from chip (5) to chip (5) mutually erase - at least partially - due to opposite field direction.
Fig. 7 shows in 3-D representation a rectifier module consisting of the series circuit of
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a diode (80a) and a thyristor (80b), wherein the load connection elements (40, 42) are arranged each in the area of shorter outer side of the housing (3). Represented here is also a power semiconductor module (1) with a base plate (2) and two chips (5), wherein here due to necessary size of the power semiconductor component (80) and the space constraints the current supply, here positive polarity, to the second chip would not be possible through the connecting track (54) of the first chip (5). It is of advantage here that the load connection element (5) and the conducting element (60) of relevant polarity are built-up as single piece. The conducting element (60) contacts the allocated connecting track (52) on the chip at a central point, so that the current supply to the power semiconductor component (80b) takes place via a bonded joint (not shown here) in the center line and thus the entire surface of the power semiconductor component (80b) is supplied with current and thus the maximum current carrying capacity of the power semiconductor component (80b) is achieved. Further connections between the connecting tracks (54) of chips (5) correspond solder joint (44) according to the state of technology.
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WE CLAIM
1. Power semiconductor module (1) at least consisting of a housing (3), load connection elements (4) leading outwards, electrically insulating, identical buildup type of multiple chips or chip sections (5) arranged inside of the housing (3), wherein these consist of an insulator (54) and multiple mutually electrically insulated metallic connecting tracks (52 a/b/c) of different polarity on the first main surface facing the inside of the power semiconductor module. On these connecting tracks per chip or chip section there is at least one power semiconductor component (80) with connecting elements for its appropriate circuit connection, wherein above and at a distance from the chips (5) or chip sections at least one conducting element (60,70) is arranged, which is connected with a load connection element (40) and a connecting track (52 a/b/c) of at least one chip (5) or chip section of identical polarity not immediately next to this load connection (40) and in case of multiple conducting elements (60, 70) of this kind, these are arranged closely to each other.
2. Power semiconductor module (1) at least consisting of a housing (3), load connection elements (4) leading outwards, electrically insulating, identical buildup type of multiple chips or chip sections (5) arranged inside of the housing (3), wherein these consist of an insulator (54) and multiple mutually electrically insulated metallic connecting tracks (52 a/b/c) of different polarity on the first main surface facing the inside of the power semiconductor module. On these connecting tracks per chip or chip section there is at least one power semiconductor component (80) with connecting elements for its appropriate circuit connection, wherein the identical types of chips (5) or chip sections are arranged in series, wherein the connecting tracks (52 a/b) of positive and negative polarity are arranged in alternating fashion in consecutive chips or chip sections and minimum two conducting elements (60, 70) connect the connecting tracks (52 a/b/c) each of which is of identical polarity of chips or chip sections
3. Power semiconductor module (1) as per claim 1 or 2,
wherein a conducting element (60, 70) is built-up as a metallic molded part (60) or as an insulator (76) with at least one conductor track (72) arranged on it.
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4. Power semiconductor module (1) as per claim 3,
wherein the conducting elements (70) are built-up as an insulator (76) with multiple conductor tracks (72) or conductor track sections on both sides of the insulator (76) and the conductor track sections are connected with each other in appropriate circuits and form conductor tracks (72).
5. Power semiconductor module (1) as per claim 4,
wherein these connections of conductor track sections are built-up as through hole contacts (74) by the insulator (76).
6. Power semiconductor module (1) as per claim 1 or 2,
wherein the connection between the connecting tracks (52 a/b/c) of the chip and the allocated conducting element (60,70) is designed as a solder joint (62) or a bonded joint (66) or by means of a pressurized spring element (64).
7. Power semiconductor module (1) as per claim 1 or 2,
wherein the connection between the load connection element (40) and the allocated conducting elements (6, 70) is designed as a solder joint (62) or as a bonded joint (66) or by means of a pressurized spring element (64).
8. Power semiconductor module (1) as per claim 1 or 2,
wherein the conducting elements (60, 70) at a central point contact the allocated connecting track (52) on the chip (5) or on the chip section.
9. Power semiconductor module (1) as per claim 1 or 2,
wherein the load connection element (40) and the conducting element (60) of related polarity are built-up as a single piece.
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Dated this 17th day of August, 2006


ABSTRACT
The invention describes a power semiconductor module with housing, load connection elements and multiple identical types of chips inside the housing. These have metallic connecting tracks of different polarity and power semiconductor components arranged on these. Above and a distance from the chips minimum one conducting element is arranged, which connects a load connection element and a connecting track of minimum one chip of the identical polarity not located immediately next to this load connection, wherein in case of multiple conducting elements, these are arranged immediately next to each other. Alternatively, in case of chips arranged in series and connecting tracks arranged on these along the longitudinal axis of the series, these connecting tracks of positive and negative polarity in case of consecutive chips are arranged in alternating fashion and at least two conducting elements connect connecting tracks each time of identical polarity of chips.
(Fig- 7)
To,
The Controller of Patents
The Patent Office
Mumbai.
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Documents:

1291-MUM-2006-ABSTRACT(16-4-2009).pdf

1291-MUM-2006-ABSTRACT(17-8-2006).pdf

1291-mum-2006-abstract(granted)-(26-5-2009).pdf

1291-mum-2006-abstract.doc

1291-mum-2006-abstract.pdf

1291-MUM-2006-CANCELLED PAGES(16-4-2009).pdf

1291-MUM-2006-CLAIMS(16-4-2009).pdf

1291-mum-2006-claims(granted)-(26-5-2009).pdf

1291-mum-2006-claims.doc

1291-mum-2006-claims.pdf

1291-MUM-2006-CORRESPONDENCE(16-4-2009).pdf

1291-mum-2006-correspondence-received.pdf

1291-mum-2006-description (complete).pdf

1291-MUM-2006-DESCRIPTION(COMPLETE)-(16-4-2009).pdf

1291-mum-2006-description(granted)-(26-5-2009).pdf

1291-MUM-2006-DRAWING(16-4-2009).pdf

1291-mum-2006-drawing(granted)-(26-5-2009).pdf

1291-mum-2006-drawings.pdf

1291-MUM-2006-ENGLISH TRANSLATION(16-4-2009).pdf

1291-MUM-2006-FORM 1(12-10-2006).pdf

1291-MUM-2006-FORM 1(13-10-2006).pdf

1291-MUM-2006-FORM 1(16-10-2006).pdf

1291-MUM-2006-FORM 1(16-4-2009).pdf

1291-MUM-2006-FORM 1(17-8-2006).pdf

1291-MUM-2006-FORM 18(17-8-2006).pdf

1291-mum-2006-form 2(16-4-2009).pdf

1291-MUM-2006-FORM 2(COMPLETE)-(17-8-2006).pdf

1291-mum-2006-form 2(granted)-(26-5-2009).pdf

1291-MUM-2006-FORM 2(TITLE PAGE)-(16-4-2009).pdf

1291-MUM-2006-FORM 2(TITLE PAGE)-(COMPLETE)-(17-8-2006).pdf

1291-mum-2006-form 2(title page)-(granted)-(26-5-2009).pdf

1291-MUM-2006-FORM 3(16-4-2009).pdf

1291-MUM-2006-FORM 3(17-8-2006).pdf

1291-MUM-2006-FORM 5(16-4-2009).pdf

1291-MUM-2006-FORM 5(17-8-2006).pdf

1291-mum-2006-form-1.pdf

1291-mum-2006-form-2.doc

1291-mum-2006-form-2.pdf

1291-mum-2006-form-3.pdf

1291-mum-2006-form-5.pdf


Patent Number 234397
Indian Patent Application Number 1291/MUM/2006
PG Journal Number 28/2009
Publication Date 10-Jul-2009
Grant Date 26-May-2009
Date of Filing 17-Aug-2006
Name of Patentee SEMIKRON ELEKTRONIK GMBH & CO.KG
Applicant Address POSTFACH 820251, 90253 NURNBERG,
Inventors:
# Inventor's Name Inventor's Address
1 THOMAS STOCKMEIER MANTEUFFELSTRASSE 39 90431 NURNBERG,
2 FRANK EBERSBERGER SCHWANDORFER STRASSE 8 90518 HILPOLTSTEIN,
3 JURGEN STEGER SCHULSTRASSE 3 91355 HILPOLTSTEIN,
4 MRACO LEDERER KINDINGER STRASSE 23 90453 NURNBERG,
PCT International Classification Number H014L23/48
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 102005039278.4 2005-08-19 Germany