Title of Invention

POWER SEMICONDUCTOR MODULE WITH OVER- CURRENT PROTECTION EQUIPMENT

Abstract The invention describes a power semiconductor module having at least one fuse equipment. The power semiconductor module consists of a housing, load connection elements leading towards outside, chip arranged inside of the housing with several mutually electrically insulated metallic connection tracks of different polarity. On at least one of these connection tracks at least one power semiconductor component is arranged and connected in appropriate circuit with first connection elements with a first conductor cross section. The fuse equipment consists of a second connection element with a second, smaller as compared with the first one, conductor cross section, arranged between two connection tracks and / or between a connection track and a load connection element, wherein this second connection element in a partial section is surrounded by an explosions protection medium.
Full Text FORM 2
THE PATENT ACT 1970 (39 of 1970)
&
The Patents Rules, 2003 COMPLETE SPECIFICATION (See Section 10, and rule 13)
1. TITLE OF INVENTION
POWER SEMICONDUCTOR MODULE WITH OVER-CURRENT PROTECTION EQUIPMENT
2. APPLICANT(S)
a) Name : SEMIKRON ELEKTRONIK GMBH & CO. KG
b) Nationality : GERMAN Company
c) Address : POSTFACH 820251,
90253 NURNBERG, GERMANY
3. PREAMBLE TO THE DESCRIPTION
The following specification particularly describes the invention and the manner in which it is to be performed : -

Description
The invention describes a power semiconductor module consisting of housing preferably with a base plate for mounting on a heat sink and at least one electrically insulating chip arranged in it. This chip on its part consists of an insulator having number of mutually insulated metallic connecting tracks and power semiconductor components located on these and connected in appropriate circuit. Further the power semiconductor module has connection elements for external load and aux. contacts and also connection elements for connections in the inside of the power semiconductor module.
Power semiconductor modules, which are the basis of this invention, are known with example from the DE 103 16 355 B3. This document reveals a power semiconductor module in the form of a half bridge circuit arrangement with a first and a second power switch. Each of these power switches is built-up as a parallel circuit of power transistors with one each allocated recovery diode. One each of first and second power transistor with allocated power diode is arranged herein on a separate chip.
According to the documents indicated as state of technology the chips of this kind of power semiconductor module are built-up as insulating chips consisting of an insulator as conductor material and for electrical insulation against a base plate or a heat sink. This insulator according to the state of technology is made of an industrial ceramic; for example, aluminum oxide or aluminum nitrite. On the first main surface of this insulator facing the inside of the power semiconductor module there are mutually electrically insulated metallic connection tracks. On this in turn the power semiconductor components are arranged.
Often the insulator has on its second main surface on the side opposite to the inside of the power semiconductor module also a metallic layer of the same material and
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same thickness like that of the connection tracks on the first main surface. Normally this layer in itself is not structured, because it serves for example for the solder joint to a base plate. The connection tracks as well as the metallic layer of the second main surface consist preferably of copper applied according to the DCB (direct copper bonding) procedure, wherein the copper here has a typical thickness of less than 1 mm.
Further, the said power semiconductor modules as per state of technology have load connection elements for both the DC connections and for the at least one AC connection. The load connection elements connect external contacts with allocated connection tracks on the chip.
For the internal insulation power semiconductor modules are cast as per state of technology up to the top of connection elements with a casting material having higher relative permittivity.
Modem power semiconductor components, especially power transistors have during the course of the technological progress a constantly rising current density. Typical connection elements between the power semiconductor components and the connection tracks are bonding connections and here especially wire bonding connections. According to the state of technology variety of error scenarios during the deployment of power semiconductor modules are captured through suitable sensors in the power semiconductor module or in the circuit of the power semiconductor module and initiated through the counter measures of control electronics, like for example the switching-off the power switch. Of course there are error scenarios, which are not or not fully captured by this arrangement. In these cases, in the inside of the power semiconductor module occurs an over current flowing for a short while, which overloads the bonding wires. This over current leads to melting of at least one bonding wire, wherein through the existing inductivities the current flow remains intact in the form of an arc. This often leads to
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an explosion of the power semiconductor module in case of power semiconductor modules with casting compound due to its missing compression ability in the short time interval and due to resultant quick building internal pressure.
The invention is based on the task to further develop a power semiconductor module with protection equipment arranged in the inside of the power semiconductor module to prevent explosion type destruction of the power semiconductor module caused by too high currents.
The protection equipment against too high currents in the inside of the power semiconductor module should be indicated below for simplification purpose as fuse equipment.
The task is resolved in the invention through the measures according to the characteristics of the claim 1. Preferred design forms are described in the sub-claims.
The thought of the invention is based on a power semiconductor module preferably with a base plate for mounting on a heat sink. This power semiconductor module has at least following components: housing, connection elements for load and aux. connections, at least one chip with connection tracks and at least one power semiconductor component.
The connecting elements for load connections lead from the housing and serve the purpose of electrical connection of power semiconductor components arranged in the inside of the housing. The electrically insulating chip built-up to form the base plate or a heat sink consists on its part of an insulator, preferably of an industrial ceramic material, and a multiple electrically mutually insulating metallic connection tracks located on the main surface on the opposite side of the base plate or the heat sink. On these connection tracks power semiconductor components are arranged and connected in appropriate circuit by means of first connection elements with a first
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conductor cross section. Preferably, these first connection elements are designed as bonded connections with several individual bonding wires. This kind of a bonded connection has a first conductor cross section, which is formed by the sum of all cross section surfaces of all bond wires of the bonded connection.
The power semiconductor module has in its inside at least one fuse equipment, wherein this fuse equipment consists of a second connection element with a second conductor cross section which is smaller in comparison with the first one. The fuse equipment is arranged between two connection tracks and /or between a connection track and a load connection element. Further, this second connection element - in a partial section - fully covered by a protection medium against explosion. This protection medium against explosion allows a controlled formation of an arc, without causing a quick increase in pressure in this explosion protection medium leading to an explosion.
The invention based solution is further explained on the basis of Fig. 1 to 3.
Fig. 1 shows a circuit topology of a power semiconductor module according to the state of technology.
Fig. 2 shows a circuit topology of an invention based power semiconductor module.
Fig. 3 shows a design of an invention based power semiconductor module.
Fig. 1 shows a circuit topology of a power semiconductor module (1) according to the state of technology. Represented here is a half bridge circuit like it is basic component of many power electronic circuit topologies. Herein a first top power switch (70) is switched in series with a second bottom power switch (72). The first power switch (70) is connected with the positive connection (42) of a DC intermediate circuit. The second power switch (72) is connected with the negative
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connection (46) of the DC intermediate circuit. The tapped center of the circuit forms the AC outlet (44) of the half bridge circuit
The power switches (70, 72) are built-up as an arrangement of at least one power transistor (70a, 72a) and at least one power diode (70b, 72b) switched anti-parallel to this.
Fig. 2 shows a circuit topology of an invention based power semiconductor module (1). The represented circuit topology is also the half bridge circuit. Similarly the thought of the invention can also be deployed in every other circuit topology. According to the invention the power semiconductor module (1) based on this circuit is developed further by integrating at least one - in this case three - fuse equipment (6 a/b/c) is/are integrated in the circuit.
An advantageous design herein in is the arrangement of a fuse equipment (6b) between the tapped center and the AC connection (44).
A further advantageous design arranges one each fuse (6a, 6c) between the respective DC connection (42, 46) and the allocated power switch (70, 72).
The arrangement of three fuse equipment (6 a/b/c) within a single power semiconductor module (1) is the most expensive, but at the same time the safest design of the invention. The arrangement of single fuse equipment (6 a/b/c) cannot protect against all possible failure scenarios, however, it forms a meaningful compromise between cost and utility.
Fig. 3 shows an invention based power semiconductor module (1). This has a base plate (2), on which the housing (3) and a chip (5) are arranged. The chip (5) consists of an insulator (54) and metallic laminations, which are arranged on both the main surfaces. The metallic lamination (53) facing the base plate (2) is built-up as flat
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surface and in is in itself not structured. By means of a solder joint between this lamination (53) and the base plate (2) these are fixed with each other. As against this, the lamination facing the inside of power semiconductor module is in itself structured and forms thus the connection tracks (52) of the chip (5).
The connection elements, here represented a DC connection (42) of positive polarity and a AC connection (44), are formed through metallic molded parts, which are connected at their one end by soldering with the allocated connection track (52) and at their other end have a cavity for screwed connection.
On these connection tracks (52) the power semiconductor components (70, 72) are arranged; here represented a power diode (70b). The electrical connection elements form the power connections (42, 44) and the aux. connections not represented explicit. The circuit-wise appropriate connection of the power semiconductor components (70,72), here the power diode (70b) as per the circuit topology as per Fig. 2 with the connection tracks (52) is built-up as bonded connection (40). For example, this bonded connection has ten individual bond wires with a diameter of 300 \im each, whereby a first conductor cross section of the connection to this power semiconductor component is approx. 0.71 mm2.
Further represented are two design forms of the invention based fuse equipment (6) of the power semiconductor module (1). The first design has a bonded connection (60) between the conductor track (52) of the positive connection and the conductor track (52) of the power diode (70b), which is arranged here on the cathode side. This bonded connection (60) is built-up by means of 5 bonded wires with a diameter of 300 ^m each. Thus a second conductor cross section emerges, which is 50 of 100 of the first conductor cross section. It is especially advantageous, if this second conductor cross section is between 40 of 100 and 60 of 100 of the first conductor cross section. This clearly smaller second conductor cross section is sufficient, since in short time current flow, a so-called surge current, exclusively the conductor cross
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section is the determining parameter. In comparison to this, the design of the bonded connections to the power semiconductor components are determined through other parameters, like for example the current distribution on the power semiconductor component. Therefore, these connections are typically built-up with particularly larger conductor cross section than this would be necessary for the conducting capacity of surge current.
The bond wires forming this second connecting element (60) are surrounded -irrespective of their respective contact surface - with the allocated conductor track (52) of Silicium dioxide (62) as explosions protection medium. Dies Silicium dioxide (62) has advantageously a grain size between 50 nm and 2mm. The Silicium oxide here is a pure material (62a) or as mixed material (62b) with a minimum concentration of Silicium oxide of 90 of 100.
It is particularly preferred, if a bonding agent is added to the Silicium oxide (62b). Herein a covering of Silicium oxide (62b) is not necessarily essential, because it surrounds bond wires (60) in bonded form and thus it is fixed in its position in the power semiconductor module (1).
The bond wires (60) with the explosion protection medium (62) are surrounded by a frame type arrangement (32), which is built-up here as part of the housing and is arranged on the chip (5) by means of a pasted connection. Thus a contact between the explosion protection medium (62) and the casting compound, preferably a silicon rubber (80) is prevented. Further, the housing (3) has on its top side a suitable cavity (30) for filling of the power semiconductor module with the explosion protection medium (62).
The second represented design shows a frame type limiting equipment (64), preferably made of a plastic material, which is connected by pasting method with the chip (5). In the inside of this limiting equipment (64) the bonded connection and the
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explosion protection medium (60) are arranged. In case this does not have an additive of a bonding medium, then herein a locking medium (66), for example an epoxy resin can be provided to for fixing the explosion protection medium (60a) in the planned position.
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WE CLAIM:
1. Power semiconductor module (1) with at least one fuse equipment (6), wherein the power semiconductor module at least consists of a housing (3), load connection elements leading towards outside (42,44,46), at least one electrically insulating chip (5) arranged inside of the housing (3), wherein this consists of an insulator (54) and several mutually electrically insulated metallic connection tracks (52) of different polarity located on the first main surface facing the inside of the power semiconductor module, with at least one power semiconductor element (70, 72) arranged on one of these connection tracks (52) with first connection elements (40) with a first conductor cross section for its connection in proper circuit, wherein the fuse equipment (6) consists of a second connection element (60) with a second, smaller as compared with the first one, conductor cross section, arranged between two connection tracks (52) and /or between connection track (52) and load connection element (42,44,46), wherein this second connection element (60) in a partial section is surrounded by an explosion protection medium (62).
2. Power semiconductor module (1) as per claim 1,
wherein each of the first connection element (40) and / or the second connection element (60) is built-up as one bonded connection with several individual identical bond wires.
3. Power semiconductor module (1) as per claim 1,
wherein the second connection element (60) and the explosion protection medium (62) of the fuse equipment is surrounded by a frame type housing part (32) or by a frame type limiting equipment (64).
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4. Power semiconductor module (1) as per claim 3,
wherein the frame type housing part (32) or the frame type limiting equipment (64) of the fuse equipment (6) has on the side opposite the chip (5) at the top portion of the explosion protection medium (62) a locking equipment (66).
5. Power semiconductor module (1) as per claim 3,
wherein the frame type housing part (32) or the frame type limiting equipment (64) of the fuse equipment (6) is connected by means of a adhesive connection with the chip (5).
6. Power semiconductor module (1) as per claim 3,
wherein the housing (3) has in the area of the frame type housing part (32) a cavity (30).
7. Power semiconductor module (1) as per claim 1
wherein the explosion protection medium (62) consists over 90 of 100 of Silicium dioxide with a grain size between 50 um and 2mm.
8. Power semiconductor module (1) as per claim 7
wherein a bonding agent is added to the explosion protection medium (62).
9. Power semiconductor module (1) as per claim 1
wherein the second conductor cross section of the second connection element (60) is between 40 of 100 and 60 of 100 of the first conductor cross section of the first connection element (40).
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10. Power semiconductor module (1) as per claim 1
wherein the power semiconductor module (1) build-up a half bridge circuit and the fuse equipment (6 a/b/c) is arranged between at least one load connection (42,44,46) and one power semiconductor component (70, 72).
Dated this 13th day of September, 2006

HIRAL CHANDRAKANT JOSHI
AGENT FOR
SEMIKRON ELECTRONIK GMBH & CO. KG

ABSTRACT
The invention describes a power semiconductor module having at least one fuse equipment. The power semiconductor module consists of a housing, load connection elements leading towards outside, chip arranged inside of the housing with several mutually electrically insulated metallic connection tracks of different polarity. On at least one of these connection tracks at least one power semiconductor component is arranged and connected in appropriate circuit with first connection elements with a first conductor cross section. The fuse equipment consists of a second connection element with a second, smaller as compared with the first one, conductor cross section, arranged between two connection tracks and / or between a connection track and a load connection element, wherein this second connection element in a partial section is surrounded by an explosions protection medium.
(Fig- 2)

To,
The Controller of Patents

The Patent Office Mumbai.

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Documents:

1475-MUM-2006-ABSTRACT(18-3-2009).pdf

1475-mum-2006-abstract(granted)-(1-4-2009).pdf

1475-mum-2006-abstract.doc

1475-mum-2006-abstract.pdf

1475-MUM-2006-CANCELLED PAGES(18-3-2009).pdf

1475-MUM-2006-CLAIMS(18-3-2009).pdf

1475-mum-2006-claims(granted)-(1-4-2009).pdf

1475-mum-2006-claims.doc

1475-mum-2006-claims.pdf

1475-mum-2006-correspondance-others.pdf

1475-mum-2006-correspondance-received.pdf

1475-MUM-2006-CORRESPONDENCE(18-3-2009).pdf

1475-mum-2006-correspondence(29-11-2006).pdf

1475-mum-2006-correspondence(ipo)-(17-9-2009).pdf

1475-mum-2006-description (complete).pdf

1475-MUM-2006-DESCRIPTION(COMPLETE)-(18-3-2009).pdf

1475-mum-2006-description(granted)-(1-4-2009).pdf

1475-MUM-2006-DRAWING(18-3-2009).pdf

1475-mum-2006-drawing(granted)-(1-4-2009).pdf

1475-mum-2006-drawings.pdf

1475-MUM-2006-ENGLISH TRANSLATION(18-3-2009).pdf

1475-MUM-2006-FORM 1(15-9-2006).pdf

1475-mum-2006-form 1(29-11-2006).pdf

1475-mum-2006-form 18(15-9-2006).pdf

1475-mum-2006-form 2(granted)-(1-4-2009).pdf

1475-MUM-2006-FORM 2(TITLE PAGE)-(18-3-2009).pdf

1475-mum-2006-form 2(title page)-(granted)-(1-4-2009).pdf

1475-MUM-2006-FORM 3(18-3-2009).pdf

1475-MUM-2006-FORM 5(18-3-2009).pdf

1475-mum-2006-form-1.pdf

1475-mum-2006-form-2.doc

1475-mum-2006-form-2.pdf

1475-mum-2006-form-26.pdf

1475-mum-2006-form-3.pdf

1475-mum-2006-form-5.pdf

abstract1.jpg


Patent Number 233636
Indian Patent Application Number 1475/MUM/2006
PG Journal Number 25/2009
Publication Date 19-Jun-2009
Grant Date 01-Apr-2009
Date of Filing 15-Sep-2006
Name of Patentee SEMIKRON ELEKTRONIK GMBH & CO. KG
Applicant Address POSTFACH 820251, 90253 NURNBERG,
Inventors:
# Inventor's Name Inventor's Address
1 CHRISTIAN KRONEDER KARL-PLESCH STR.27, 90596 SCHWANSTETTEN
2 UWE SCHEUERMANN SCHWABACHER STR.94 90439 NURNBERG
3 DEJAN SCHREIBER PIRKHEIMERSTR.49 90489 NURNBRG
PCT International Classification Number H01L25/07
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 10 2005046063.1 2005-09-27 Germany