Title of Invention

''AN APPARATUS TO INTERFACE GRAPHIC CONTROLLER CHIP WITH MULTI-SYNC SVGA MONITORS''

Abstract

An apparatus for interfacing graphic controller chip with multi-sync SVGA monitor to provide performance comparable to RGB monitor characterise in that a sync separator/amplifier (5) separates sync signal from (SOG) sync on green and adapted to receive signals from a graphic controller chip (1), a buffer plus phase inverter (6), reduces loading and phase inverts the composite sync signal received from sync separator / amplifier, connected to the output of said amplifier, (TTL) Transistor transistor logic level converter (7) connected to said buffer phase inverter, a buffer (8) which buffers the composite sync signal received from (TTL) Transistor Transistor Logic level converter (7) into Horizontal sync (H Sync) signal, connected to said converter, integrator and emitter follower (9) connected to said converter, said follower connected to said buffer through two inverters (11) and (12).

Full Text

FIELD OF INVENTION This invention relates to an apparatus for interfacing Graphic controller chip with multi-sync SVGA (Super Video Graphic Adaptor) monitors to obtain • comparable resolution as that of a RGB monitors which are comparatively very expensive. PRIOR ART RGB (Red Green Blue) monitors are used for data visualisation. RGB monitors are ruggedised and capable of receiving composite video signals or separated video and synchronous signals. The main limitation of use of RGB monitors is that these monitors are costly, about 819—1(90 times more than a SVGA monitor, and therefore their use is not cost-effective for system development purposes where number of RGB monitors are required. Another disadvantage of the RGB monitors is that these are bulky. Still another disadvantage of the RGB monitors is that their maintenance is difficult and costly. Further disadvantage of the RGB monitors is that these are not readily available off-the-shelf in the market while SVGA monitors are readily available. OBJECTS OF THE PRESENT INVENTION The primary object of the present invention is to provide an apparatus for interfacing graphic controller chip with multi-sync SVGA monitors to provide a cheaper alternative option to the costly RGB monitors, thereby enabling drastic reduction in development cost of the systems. Another obiect of the present invention is to provide an apparatus for interfacing graphic controller chip with multi-sync SVGA monitors to provide resolution comparable to that of RGB monitors. Still another object of the present invention is to provide an apparatus for interfacing graphic controller chip with multi-sync SVGA monitors which are lighter in weight and hence easy to handle . Further object of the present invention is to provide an apparatus for interfacing graphic controller chip with multi-sync SVGA monitors to enable its use as a standby, to costly RGB monitor thereby reducing the down time. Still further object of the present invention is to provide an apparatus for interfacing graphic controller chip with multi-sync SVGA monitors, which are readily available, to obtain performance comparable to RGB monitors, which are not readily available off-the-shelf in the market. Even further object of the present invention is to provide an apparatus for interfacing graphic controller chip with multi-sync SVGA monitors wherein the apparatus is SVGA upward compatible STATEMENT OF INVENTION According to this invention there is provided an apparatus for interfacing graphic controller chip with multi-sync SVGA monitor to provide performance comparable to RGB monitor comprising a sync separator/amplifier (5) adapted to receive signals from a graphic controller chip (1), a buffer + phase inverter (6) connected to the output of said amplifier, TTL level converter (7) connected to said buffer phase inverter, a buffer (8) connected to said converter, integrator and emitter follower (9) connected to said converter, said follower connected to said buffer through two inverters (11) and (12). Fig. l(a) illustrates the use of known RGB monitors. The graphic controller chip like ADV 453 is capable of producing Red (R), Blue (B) and Sync on Green (SQG) signals. RGB monitors require only 3 lines R, SOG, B to reproduce video display. The internal circuitry of RGB monitors is capable of separating »ync signal from SOG signal so as to obtain Horizontal sync (H Sync) and Vertical sync (V Sync) signals. Thus the signals R, SOB, B produced by graphic controller chip like ADV 453 are directly compatible and can straight away be applied to RGB monitors. On the other hand, SVGA monitor require separated analog video signal* (RGB) and digital sync signal. The composite SO6 signal produced by graphic controller chip if directly fed into SVGA monitor is therefore not compatible with SVGA monitor standard. More over SOG signal if directly applied to SVGA monitor would lead to greenish background with some SVGA monitors. The interfacing apparatus of the present invention resolves this problem by converting the R, SOG, B signals received from graphic controller chip into R,G,B (collectively referred in the art as analog video signal) and horizontal sync (H sync) and vertical sync (V sync) signals. In other words SOG signal is separated into Green only and H sync and V sync signals. In this way separate analog signals (RGB) and sync signals are fed into multi-sync SVGA monitor. The interfacing apparatus of the present invention is shown in fig. 3. The Sync on Green (SOG) signal from the graphic controller chip like ADV453 is simultaneously fed into Sync separator/amplifier (5) and Sync remover + buffer (10). Sync separator/ amplifier (5) separates and amplifies the sync signal from the composite SOG signal whereas the Sync remover + green buffer(lO) removes sync signals and its output is green signal only, which is directly applied to SVGA monitor. The sync signal separated by sync separator/amplifier (5) is successively applied through Buffer + Phase inverter (6), TTL (Transistor Transistor Logic) level converter (7) and thereafter simultaneously to Buffer (8) and to Integrator and emitter follower (9). The output of signal directly fed into the Buffer(8) is taken as Horizontal Sync (H Sync) signal. The output from Integrator and emitter follower (9) is fed into Inverter (1 l),The output from Inverter (11) is simultaneously applied to Buffer (8) and Inverter (12). The output from Inverter (11) is vertical sync (V Sync) signal while the output from Inverter (12) is inverted vertical sync signal (V sync\). DESCRIPTION WITH REFERENCE TO DRAWINGS The apparatus of the present invention will now be described with respect to accompanying drawings which are intended to illustrate an embodiment of the present invention and are not intended to be taken restrictively to imply any limitation on the scope of the present invention, wherein Fig 1 (a): Shows the existing arrangement of use of RGB monitor with graphic controller chip as known in the art. Fig 1 : Shows the arrangement of Interfacing apparatus of present invention connected between graphic controller chip and multi-sync SVGA monitor. Fig 2 : Shows the block diagram of the Interfacing apparatus of the present invention for negative modulated video signals. Fig 3 : Shows the block diagram of the interfacing apparatus of the present invention for positive as well as negative modulated video signal DESCRIPTION OF THE INVENTION WITH RESPECT TO DRAWINGS i Referring to Fig 1, graphic controller chip (1) is capable of producing R (Red), B (Blue) and SOG (Sync on Green) signals. requires analog signals (ie: R, G, B signals ) and digital sync signals separately for displaying video information. Interfacing converts the SOG signal into green (G) and Horizontal sync (H Sync), Vertical Sync (V Sync) Signals. Referring to Fig 2, the Sync on green (SOG) signal is applied to Sync separator/amplifier (5) and simultaneously to Sync remover + green buffer (10). The Sync separator/amplifier (5) is constituted by a diode clamper and a class 'A' amplifier. The diode clamps the composite sync signal which is amplified by the class 'A' amplifier. The sync remover + green buffer (10) is an emitter follower with diode clamp which removes the sync signal from the SOG before buffering. The output of the sync remover + green buffer (10) contains green signal alone , which is directly fed as "green" input to SVGA (Fig 1). Sync separator/amplifier (5) is connected to Buffer + Phase Inverter (6) which is constituted by a Darlington pair. The output from sync separator/amplifier (5) is applied by Buffer + Phase inverter (6) which introduces minimum loading on the amplified composite sync signal. The output of Buffer + Phase Inverter (6) is an inverted version of composite sync signal. Buffer + Phase inverter (6) is connected to TTL (Transistor Transistor Logic) level converter (7) . TTL level converter (7) is a gating circuit which makes AND operatidh with composite sync signal. The output of Buffer + Phase Inverter (6) is input to TTL Level Converter (7) which converts the received inverted composite sync signal to TTL level. The output of TTL level converter (7) is routed to Buffer (8) as well as to integrater and emitter follower (9). Buffer (8) is constituted by a TTL Buffer which increases the drive capability of the sync signals. The output of Buffer(8) produced from the direct input from TTL level converter is horizontal Sync (H Sync\) input of the SVGA monitor. Integrator and emitter follower (9) is constituted by an emitter follower and integrating network. The output of integrator and emitter follower (9) routed through inverter (11) and Buffer(8) is Vertical Sync (V Sync) signal. The output of inverter(12) through Buffer (8) is inverted Vertical sync signal (V Sync\). Another preferred embodiment of the pmsentinterfacing apparatus is constructed as shown in Fig3. This embodiment is particularly useful for meeting the requirement of negative modulation as well as positive modulation for sync separation and to select positive or negative video. In this embodiment, two more stages are provided. In this case also SOG signal from graphic controller chip (1) is simultaneously applied to sync separator/amplifier (5) and sync remover + green buffer(10). But in this embodiment the SOG signal is applied to sync separator/amplifier through "Sync Polarity Select"(l3) and SIB , SIC sets of contacts of a two-way three-pole slide switch The two-poles SIB, SIC of three-pole switch are connected to the sync separator/amplifier (5). The SOG signal to sync remover + green buffer (10) is applied through "Video Polarity Select" (14) and through the third-pole SI A of the three-pole slide switch . ' The Sync Polarity Select (13) and Video Polarity Select (14) are basically class A amplifiers with inverted and non inverted output facility. The non-inverted output is represented by " + " output whereas inverted output is represented by'"-" output. In the case of negative modulated signals the Sync Polarity Select (13) is bypassed by the selection of the section SIB and SIC of the Slide Switch. At the same time, Video Polarity Select option is achieved through the switch section SI A. In this case, the non-inverted output of the Video Polarity Select (14) is connected to the input of the Sync Remover + Green Buffer (10) through the Switch Section SI A. In the case of positive modulate*! signals, the Sync Polarity Select (13) become operational and inverter Sync output is taken out from the Sync Polarity Select (13) and applied to the input of the Sync Separator/Amplifier (5) as in the previous case. The inverted video signal from the Video Polarity Select (14) signal is taken out as input for the Sync Remover + Green Buffer (10). The switch contacts for negative or positive modulation, are as under Negative Modulation SI A 23 connected to 22 Negative Modulation SIB 15 connected to 17 Negative Modulation SIC 20 connected to 18 Positive Modulation SI A 23 connected to 21 Positive Modulation SIB 15 connected to 16 Positive Modulation SIC 20 connected to 19 It is to be understood that the particular embodiment described herein is shown by way of illustration only and not as a limitation on the scope of invention. The principle and features of this invention can be employed by persons skilled in art through different adaptations, changes and modifications of the embodiment described herein Such modifications, adaptations, changes in the embodiments are intended to be considered within the scope of the present invention is further set-forth under claims:- WE CLAIM; 1. An apparatus for interfacing graphic controller chip with multi-sync SVGA monitor to provide performance comparable to RGB monitor characterise in that a sync separator/amplifier (5) separates sync signal from (SOG) sync on green and adapted to receive signals from a graphic controller chip (1), a buffer plus phase inverter (6), reduces loading and phase inverts the composite sync signal received from sync separator / amplifier, connected to the output of said amplifier, (TTL) Transistor transistor logic level converter (7) connected to said buffer phase inverter, a buffer (8) which buffers the composite sync signal received from (TTL) Transistor Transistor Logic level converter (7) into Horizontal sync (H Sync) signal, connected to said converter, integrator and emitter follower (9) connected to said converter, said follower connected to said buffer through two inverters (11) and (12). 2. An apparatus as claimed in claim 1, wherein said seperator/amplifier (5) is adapted to receive signals from a graphic controller chip (1) through a sync polarity select (13) and (SIB) and (SIC) section of a two way three pole slide switch for positive as well as negative modulated signals. 3. An apparatus as claimed in claim 2 comprising sync remover plus green buffer (10) which, for positive as well as negative modulated video signals, is connected through video polarity select 14) and SIC section of three pole slide switch. 4. An apparatus for interfacing graphic controller chip with multi-sync SVGA monitor as claimed in claim 1, wherein inverter (11) produces vertical sync signal (v sync) through buffer (8). 5. An apparatus for interfacing graphic controller chip with multi-sync SVGA monitor as claimed in claim 1, wherein inverter (12) produces inverted vertical sync signal (v sync) through buffer (8). 6. An apparatus for interfacing graphic controller chip with multi-sync (SVGA ) monitor as claimed in claim 2, wherein said the Sync Polarity Select (13) is provided for inversion and amplifying of positive modulated video signal received from graphic controller chip (1). 7. An apparatus for interfacing graphic controller chip with multi-sync (SVGA) monitor as claimed in claim 1, wherein Video Polarity Select (14) is provided for inversion and amplification of positive Sync on green (SOG) signal from graphic controller chip (1) to produce inverted video signal Sync on green (SOG) of required polarity. 8. An apparatus for interfacing graphic controller chip with multi-sync SVGA monitor substantially as described and illustrated herein.

Documents:

1466-del-1999-abstract.pdf

1466-del-1999-claims.pdf

1466-del-1999-correspondence-others.pdf

1466-del-1999-correspondence-po.pdf

1466-del-1999-description (complete).pdf

1466-del-1999-drawings.pdf

1466-del-1999-form-1.pdf

1466-del-1999-form-19.pdf

1466-del-1999-form-2.pdf

1466-del-1999-form-3.pdf

1466-del-1999-gpa.pdf