Title of Invention	RADIO FREQUENCY IDENTIFICATION ARCHITECTURE
Abstract	A RADIO FREQUENCY IDENTIFICATION (RFID) ARCHITECTURE IS DESCRIBED . RFID TAGS ARE INTERROGATED BY A READER, WHICH MAY BE LOCATED IN A NETWORK OF READERS. THE READER TRANSMITS SYMBOLS TO THE TAGS. TAGS RESPOND TO THE INTERROGATIONS WITH SYMBOLS THAT EACH REPRESENT ONE OR MORE BITS OF DATA. AN RFID TAG INCLUDES AN ANTENNA PAD, A RECEIVER, A STATE MACHINE, A CHARGE PUMP, AND A MODULATOR. THE RECEIVER IS COUPLED TO THE ANTENNA PAD. THE RECEIVER RECEIVES A SYMBOL FROM THE ANTENNA PAD AND OUTPUTS A RECEIVED SIGNAL. THE STATE MACHINE IS CONFIGURED TO DETERMINE A RESPONSE SYMBOL FROM THE RECEIVED SIGNAL AND AN OPERATING STATE OF THE TAG. THE MODULATOR IS COUPLED TO THE ANTENA PAD. THE MODULATOR IS CONFIGURED TO BACKSCATTER MODULATE THE RECEIVED SYMBOL WITH THE RESPONSE SYMBOL. THE MODULATOR IS CONFIGURED TO OUTPUT THE BACKSCATTER MODULATED SYMBOL TO THE ANTENNA PAD. THE CHARGE PUMP IS CONFIGURED TO CONVERT A RECEIVED HIGH FREQUENCY SIGNAL TO A SUBSTANTIALLY DIRECT CURRENT (DC) VOLTAGE.

Title of Invention

RADIO FREQUENCY IDENTIFICATION ARCHITECTURE

Abstract

A RADIO FREQUENCY IDENTIFICATION (RFID) ARCHITECTURE IS DESCRIBED . RFID TAGS ARE INTERROGATED BY A READER, WHICH MAY BE LOCATED IN A NETWORK OF READERS. THE READER TRANSMITS SYMBOLS TO THE TAGS. TAGS RESPOND TO THE INTERROGATIONS WITH SYMBOLS THAT EACH REPRESENT ONE OR MORE BITS OF DATA. AN RFID TAG INCLUDES AN ANTENNA PAD, A RECEIVER, A STATE MACHINE, A CHARGE PUMP, AND A MODULATOR. THE RECEIVER IS COUPLED TO THE ANTENNA PAD. THE RECEIVER RECEIVES A SYMBOL FROM THE ANTENNA PAD AND OUTPUTS A RECEIVED SIGNAL. THE STATE MACHINE IS CONFIGURED TO DETERMINE A RESPONSE SYMBOL FROM THE RECEIVED SIGNAL AND AN OPERATING STATE OF THE TAG. THE MODULATOR IS COUPLED TO THE ANTENA PAD. THE MODULATOR IS CONFIGURED TO BACKSCATTER MODULATE THE RECEIVED SYMBOL WITH THE RESPONSE SYMBOL. THE MODULATOR IS CONFIGURED TO OUTPUT THE BACKSCATTER MODULATED SYMBOL TO THE ANTENNA PAD. THE CHARGE PUMP IS CONFIGURED TO CONVERT A RECEIVED HIGH FREQUENCY SIGNAL TO A SUBSTANTIALLY DIRECT CURRENT (DC) VOLTAGE.

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Patent Number

208553

Indian Patent Application Number

01065/KOL-NP/2003

PG Journal Number

31/2007

Publication Date

03-Aug-2007

Grant Date

02-Aug-2007

Date of Filing

22-Aug-2003

Name of Patentee

MATRICS, INC.

Applicant Address

COLUMBIA CORPORATE PARK 1, SUITE 3000, 8850 STANFORD BLVD., COLUMBIA, MD 21045, USA.

Inventors:

#	Inventor's Name	Inventor's Address
1	ARNESON MICHAEL R	1500 CONROSE DRIVE, WESTMINSTER, MD 21157, USA.
2	BANDY WILLIAM R	2406 BELL BRANCH ROAD, GAMBRILLS, MD 21157, USA.
3	POWELL KEVIN J	1202 CHERRY TREE LANE, ANNAPOLIS, MD 21403, USA.
4	SHANKS WAYNE E	1731 LANCASTER STREET, BALTIMORE, MD 21231, USA.

PCT International Classification Number

G06K 9/00

PCT International Application Number

PCT/US02/03989

PCT International Filing date

2002-02-12

PCT Conventions:

#	PCT Application Number	Date of Convention	Priority Country
1	60/267,713	2001-02-12	U.S.A.