| Title of Invention | A DESIGN ANALYSIS +WORKSTATION (DAW) FOR ANALYZING AN INTEGRATED CIRCUIT |
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| Abstract | A design analysis workstation (220) for performing design analysis of integrated circuits provides facilities for extracting design and layout information from digital image-mosaics (238) captured during deconstruction of an integrated circuit (110). Each image-mosaic is displayed in at least one mosaic-view (262) as a background image that is overlaid with at least one annotation overlay (304). An engineer analyst creates annotation objects (322) on the annotation overlay based on information inferred concurrently from one or more image-mosaics. The annotation objects have properties that are editable. Concurrent display of a plurality of image-mosaics facilitates an understanding of interrelations between components on different layers.. |
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| Patent Number | 205309 | |||||||||||||||
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| Indian Patent Application Number | 00467/KOLNP/2003 | |||||||||||||||
| PG Journal Number | 14/2007 | |||||||||||||||
| Publication Date | 06-Apr-2007 | |||||||||||||||
| Grant Date | 05-Apr-2007 | |||||||||||||||
| Date of Filing | 16-Apr-2003 | |||||||||||||||
| Name of Patentee | CHIPWORKS | |||||||||||||||
| Applicant Address | 3685 RICHMOND ROAD, SUITE 500, OTTAWA ONTARIO K2H 5B7 , | |||||||||||||||
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| PCT International Classification Number | H 01 L 21/66 | |||||||||||||||
| PCT International Application Number | PCT/CA01/01455 | |||||||||||||||
| PCT International Filing date | 2001-10-18 | |||||||||||||||
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