Title of Invention

A METHOD FOR PREVENTING A FAULTY TRIPPING IN POWER CIRCUIT BREAKER

Abstract This invention relates to power circuit breakers which comprise a current transformer (6) having an ironless current detection coil (7) and an integration circuit (8) connected in outgoing circuit to said current detection coil (7), a faulty tripping can result due to the unavoidable time constant of the integration circuit (8). This is prevented by the inventive method in which the instantaneous values of the current are detected and stored in established periodic intervals (n, n+1, n+2). The stored measured values are compared according to polarity and magnitude. If the stored values of the same polarity prove to be monotonically decreasing, it is then assumed that an equivalent term is output by the integrator (8), and a trip blocking signal is input into the electronic trip of the power circuit breaker.
Full Text Description
The invention relates to a method for operating an electronic overcurrent release for a power breaker, which has a current transformer for supplying the overcurrent release with a signal which is proportional
to the current through the power breaker, which current transformer has a current detection coil without iron, and an integration circuit connected downstream from the current detection coil.
Current transformers having a current detection coil without any iron are used in order to monitor a very wide current range with as little error as possible. The output signal from such a current detection coil, which is also known as a Rogowski coil, is processed in the integration circuit, in order to convert the signal, which is based on the Rogowski principle and proportional to the current change, to a signal which is directly proportional to the current to be measured. This conversion do.es not intrinsically involve any difficulties since, in principle, an R-C combination is adequate for use as the integration circuit. However, such an integration circuit cannot follow changes in the current to be measured at an indefinitely fast rate. It is thus possible for a signal to appear at the output of the integration circuit even though the current to be measured has assumed a value ZERO.
The described behavior of the integration circuit can lead to difficulties during operation of the power breaker if a signal appears at the output of the integration ,circuit, when no current is any longer flowing, of such a magnitude that

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further processing of the signal in the overcurrent release leads to the emission of a tripping command to the power breaker.
The invention is baaed on the object * of preventing spurious tripping resulting from the behavior of the integration circuit.
According to the invention, this object is achieved by the following steps in the method mentioned initially;
a) measurement of the instantaneous value of the signal from the current transformer at defined periodic intervals,
b) storage of at least two successive measured values obtained in step a),
c) comparison of each of the measured values with the at least two previously stored measured values, and
d) output of a tripping inhibit signal to the electronic overcurrent release if all the measured values correspond to a monotonally falling function and the difference between successive measured values is at least 10%,
For the purposes of Che invention, it is recommended that the time interval between the measured .values be short in comparison to the time constant of the integration circuit, to be precise preferably 4.5 ms when the frequency of the current to be measured is 50 Kz,
For the practical implementation of the described method, it has been found to be sufficient for successively following comparison of the measured values, if these measured values are read to a three-cell ring buffer.
As a further solution for said object/ the invention provides a method in which the tripping threshold value of the

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overcurrent release is increased by a basic offset value for short-time-delay tripping and q-round-fault" tripping, which basic offset value corresponds to a DC element which is emitted by the integration circuit in the event of an interruption in the current, and in that the basic offset value can be varied as a function of a decay function of the DC element.
The invention is explained in more detail in the following text with reference to the , exemplary embodiment which is illustrated in the figuresw
Figure 1 shows an outline circuit diagram of a power breaker with an electronic overcurrent release and a Rogowski current transformer.
Figure 2 shows a graph illustrating the profile of the
primary current, the output variable of a current
transformer and the output variable of an integrator,
plotted against time.
Figure 3 shows a flowchart which illustrates the principle of the method according to the invention.
Figure 1 shows, as the main components of a low-voltage power breaker, a switching contact 1, having one or more poles, in a main current path 2, a switching mechanism 3 and a drive apparatus 4. The switching mechanism 3, which is latched in the connected position of the switching contact l, can be released by means of an electronic overcurrent release 5, to which a control signal, which is proportional to the current in the main current path 2, is supplied as an input variable. This control signal is provided by a current transformer^ S, which is in the form of a transformer without any iron anB having a wide dynamic ranges and which contains an. integration circuit 8 in Addition to a Rogcwski coil 7.

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The time profile of the measurement variables is shown in more detail in Figure 2. In this figure, Ip denotes the actual primary currant in the circuit to be monitored. A voltage u«dl/dt can be tapped off from the Rogowski coil of the current transformer. The integrator (8 in Figure 1) which follows the Rogowski coil converts this voltage to a variable vs=udt. Hhile the current Ip and the voltage u end at the current interruption time, which is annotated to, the voltage v at the output of the integrator decays only gradually. The times at which instantaneous value detection is carried out are annotated n, n+1, n+2 and so on, as shown in Figure 1, according to the flowchart. If these values have the same polarity and have a falling trend, then it is clear that there is a decaying DC element originating from the integrator. In this case, the1 tripping of the power breaker is inhibited, thid avoiding any unnecessary disturbance in the supply to loads,
The flowchart shown in Figure 3 starts with the periodic call of a teat routine, with the periodic intervals being based on the decay function of the DC element of said integration circuit (8 in Figure 1), An interval of 4.5 ma between the test routines has been found to be reasonable. Measured values detected at these intervals are read in a three-cell ring buffer with the positions n, n+i and n+2- The successive values stored in the ring buffer are now compared with one another, on the basis of polarity and magnitude. If the successive stored values have the same polarity and if their magnitudes increase, then this results in the preconditions for conditional tripping. If, on the other hand, the values decrease mono tonally. «then -t-his indicates a DC erement""wh.ich.9is_not""int'en'de"d- to lead to

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tripping, The routine is repeated in order to ensure correct operation of the power breaker.










6. WE CLAIMS
1- A method for preventing a faulty tripping in power
circuit breaker, the power circuit breaker comprising: a current transformer with a signal which is proportional to the current through the power circuit breaker, the current transformer (6) having an ironless current detection coil (7), and an integration circuit (B) connected downstream from the current detection coil a) measuring the instantaneous value of the current at defined periodic intervals ;
b) staring at least two successive measured values obtained in step a> %
c> comparing each of the measured values with the at least two previously stored measured values according to polarity and magnitude;
d> outputting a tripping inhibit signal to the electronic overcurrent release (5) by the integration circuit , if all the measured values correspond to a monotonally falling function and the difference between successive measured values is at least 10% * 2. The method as claimed in claim 1, wherein the time interval between the measured values is short in comparison to

7.
the time constant of the integration circuit, preferably 4-5 ms when the frequency of the current to be measured is 50 Hz.
3. The method a© claimed in claim 1, wherein for successively following the comparison of the measured values, the measured values are read to a three-cell ring buffer.
4. A method for preventing a faulty tripping in power circuit breaker, the power circuit breaker comprising a current transformer for supplying the overcurrent release with a signal which is proportional to the current through the power breaker, the current transformer having an iron less current detection coi1 (7) and an integration circuit (8) connected downstream from the current detection coi1 (7), the method comprising the steps of &

- increasing the tripping threshold value of the over-current release by a basic offset value for a short— time-delay tripping and ground-fault tripping, the basic offset value corresponding to a DC element which is emitted by the integration circuit (8) in the event of an interruption in the current; and
- varying the basic offset value as a function of a decay function of the DC element.
This invention relates to power circuit breakers which comprise a current transformer (6) having an ironless current detection coil (7) and an integration circuit (8) connected in outgoing circuit to said current detection coil (7), a faulty tripping can result due to the unavoidable time constant of the integration circuit (8). This is prevented by the inventive method in which the instantaneous values of the current are detected and stored in established periodic intervals (n, n+1, n+2). The stored measured values are compared according to polarity and magnitude. If the stored values of the same polarity prove to be monotonically decreasing, it is then assumed that an equivalent term is output by the integrator (8), and a trip blocking signal is input into the electronic trip of the power circuit breaker.

Documents:


Patent Number 201385
Indian Patent Application Number IN/PCT/2001/01235/KOL
PG Journal Number 7/2007
Publication Date 16-Feb-2007
Grant Date 16-Feb-2007
Date of Filing 23-Nov-2001
Name of Patentee SIEMENS AKTIENGESELLSCHAFT
Applicant Address WITTELSBACHERPLATZ 2, D-80333 MUNCHEN,
Inventors:
# Inventor's Name Inventor's Address
1 BAUMGARTL ULRICH RIENSBERGSTRASSE 51, D-13599 BERLIN,
2 SCHILLER MANFRED AM WIESELBAU 42, D-14169 BERLIN,
PCT International Classification Number H 02 H 1/04;
PCT International Application Number PCT/DE00/01803
PCT International Filing date 2000-05-31
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 199 27 029 5 1999-06-04 Germany