Title of Invention	A SEMICONDUCTOR DEVICE
Abstract	ABSTRACT A semiconductor device comprising; an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, said first surface being connected to said interconnection conductor via a first solder layer; and a semiconductor chip, said semiconductor chip being connected to the second surface of said intervening element via a second solder layer so that said intervening element absorbs the heat generated in said semiconductor chip; said semiconductor device being characterized in that said semiconductor device comprises at least either a first protruding part or a second protruding part, said first protruding part being formed at least either on said interconnection conductor or on the first surface of said intervening element, said first protruding part having a predetermined protruding height, said tirst protruding part being located at a position opposite to a corresponding element or a plurality of first protmding parts being located at positions opposite to each other so that said first solder layer has a thickness greater than 25 µm, said second protruding part being formed at least either on the second surface of said intervening element or on said semiconductor chip, said second protruding part having a predetermined protruding height, said second protruding part being located at a position opposite to a corresponding element or a plurality of second protmding parts being located at positions opposite to each other so that said solder layer has a thickness greater than 25 µm.

Title of Invention

A SEMICONDUCTOR DEVICE

Abstract

ABSTRACT A semiconductor device comprising; an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, said first surface being connected to said interconnection conductor via a first solder layer; and a semiconductor chip, said semiconductor chip being connected to the second surface of said intervening element via a second solder layer so that said intervening element absorbs the heat generated in said semiconductor chip; said semiconductor device being characterized in that said semiconductor device comprises at least either a first protruding part or a second protruding part, said first protruding part being formed at least either on said interconnection conductor or on the first surface of said intervening element, said first protruding part having a predetermined protruding height, said tirst protruding part being located at a position opposite to a corresponding element or a plurality of first protmding parts being located at positions opposite to each other so that said first solder layer has a thickness greater than 25 µm, said second protruding part being formed at least either on the second surface of said intervening element or on said semiconductor chip, said second protruding part having a predetermined protruding height, said second protruding part being located at a position opposite to a corresponding element or a plurality of second protmding parts being located at positions opposite to each other so that said solder layer has a thickness greater than 25 µm.

Full Text	The present invention relates to a semiconductor device including a soldered semiconductor chip used for example in a controller of an AC generator installed for example on a car, and also to a method of producing such a semiconductor device. Description of the Related Art First, the circuit configuration of a controller including a semiconductor device as one of its components, designed to control an AC generator for use in a car will be described. Figure 8 is a circuit diagram of such a controller for controlling an AC generator for use in a car. As shown in Figure 8, the AC generator 1 for use in a car includes a three-phase armature coil 101 for example in the star-connected form and a field coil 102. A rectifier 2 is for example a full-wave rectifier including a three-phase full-wave rectifier consisting of six diodes, a rectifying output terminal 201, a ground terminal 202, and three input terminals 203 each of which is connected to one end of each armature coil 101 of the AC generator 1 . A semiconductor device designed to act as a voltage regulator 3 is composed of dividing resistors 301 and 302, a Zener diode 303, a control transistor 304, a base bias resistor 305, a power transistor 306, a suppression diode 307, and a capacitor 308. The dividing resistors 301 and 302 are connected in series to each other. The other end of the resistor 301 is connected to the positive terminal of a battery 4 described later, and the other end of the resistor 302 is grounded wherein the rectifying output terminal 201 of the rectifier 2 is also connected to the positive terminal of a battery 4 which will be described later so that the voltage generated by the generator may be detected. The cathode of the Zener diode 303 is connected to a node 301a via which the dividing resistors 301 and 302 are connected to each other. The base of the control transistor 304 is connected to the anode of the Zener diode 303, the collector of the control transistor 304 is connected to the base of the power transistor 306, and the emitter of the control transistor is grounded. The base of the power transistor 306 is connected to the positive terminal of the battery 4 via the base bias resistor 305 and a key switch, and the base of the power transistor 306 is also connected to the collector of the control transistor 304. The collector of the power transistor 306 is connected to the output terminal 201 of the rectifier 2 via the field coil 102 of the AC generator 1, and the emitter of the power transistor 306 is grounded. The suppression diode 307 is connected in parallel to the field coil 102, that is, the anode of the suppression diode 307 is connected to the collector of the power transistor 306, and the cathode is connected to the output terminal 201 of the rectifier 2. The battery 4 is connected between the output terminal 201 of the rectifier 2 and ground. The key switch 5 is connected between the positive terminal of the battery 4 and the other end of the base bias resistor 305 disposed in the voltage regulator 3, A starter switch 5 and a starter 7 are connected in series between the positive and negative terminals of the battery 4. The controller is formed with the rectifier 2, the voltage regulator 3, the battery 4, the key switch 5, the starter switch 6, and the starter 7. The operation of the controller constructed in the above-described manner will be described below. If the key switch 5 is turned on, a 12V terminal voltage of the battery 4 is applied to the Zener diode 303 via the resistor 301. However, the terminal voltage is not so high to turn on the Zener diode 303, and therefore, the control transistor 304 remains in an off-state. As a result, a current flows from the battery 4 via the base bias resistor 305 into the base of the power transistor 306, whereby the power transistor 306 is turned on. Thus, a field current flows from the battery 4 into the field coil 102. In this situation, if the starter switch 6 is turned on, the starter 7 is driven by the battery 4 and rotates. As a result, a mechanism (not shown) linked to the starter 7 starts to operate. The AC generator 1 is driven by this mechanism and the AC generator 1 starts to generate electric power, and thus the output voltage of the AC generator 1 rises. While the output voltage is less than a predetermined value, for example 14,4 V, both the Zener diode 303 and the control transistor 304 remain in the off-state, and thus the power transistor 306 is maintained in the on-state. As a result, the field current flowing through the field coil 102 increases, and the output voltage of the AC generator 1 rises further. If the , output voltage becomes greater than the predetermined value, for example 14.4 V, then both the Zener diode 303 and the control transistor 304 are turned on, and thus the power transistor 306 is turned off. As a result, the field current decreases, and the output voltage drops. The above operation is repeated and thus the output voltage of the generator is adjusted to 14.4 V by the voltage regulator 3. When the power transistor 306 is turned off, the current which has been flowing through the field coil T02 until that time is forced to flow through the suppression diode 307 so as to prevent an excessive voltage from appearing across the terminals of the field coil 102. That is, each time the power transistor 306 turns off, a current flows through the suppression diode 307. The capacitcar 308 is used to smooth a detection voltage obtained by being divided via the dividing resistors 301 and 302. Among the above-described elements of the controller, the dividing resistors 301 and 302, the Zener diode 303, the control transistor 304, the base bias resistor 305, the power transistor 306, the suppression diode 307 and the capacitor 308 are mounted on a printed circuit board so that a semiconductor device acting as the voltage regulator 3 is formed. Referring to Figure 7, the structure of the semiconductor device of this type will be described below. Figure 7 is a cross-sectional view illustrating main parts of a conventional semiconductor device acting as a controller for controlling an AC generator for use in a car. In Figure 7, the semiconductor device 11 corresponds , to the voltage regulator 3 shown in the circuit diagram of Figure 8, and is constructed as follows: A circuit substrate 12 is made up of ceramic containing about 96 wt% of alumina so that it has a shape of a rectangular plate with a size of about 22 mm (width) .30 mm {length) 0.63 mm (thickness). An interconnection conductor 13 is formed on the circuit substrate 12 by coating a Ag-Pd-based thick conductive material on the circuit substrate 12 by means of a screen printing technique. A first solder layer 14 is formed on the interconnection conductor 13 by dipping the circuit substrate 12 on which the interconnection conductor 13 has been printed into a solder bath. The first solder layer 14 serves to solder the lower face of a tab 15, which will be described later, to the interconnection conductor 13. The tab 15 serves as an intervening element and is made up of a cubic copper material so that the tab 15 has dimensions of 2.2 mm square and 1.8 mm in height A. A silicon chip 17 serving as the semiconductor chip has a size of 1.6 mm square 0.2 mm in thickness. The silicon chip 17 is a diode corresponding to the suppression diode 307 shown in the circuit diagram of Figure 8. The silicon chip 17 has a plate-shaped electrode (not shown} with a size of 1 mm square on its upper surface, and also has a similar plate-shaped electrode on the lower surface. A second solder layer 15 is formed by heating a solder pellet placed between the tab 15 and the silicon chip 17 so that the solder pellet is melt and thus the bottom face of the silicon chip 17 is soldered to the upper face of the tab via the solder layer 16. A lead wire 18 serving as a single conducive . wire corresponds to the lead wire connected to the cathode of the suppression diode 307 shown in the circuit diagram of Figure 8. The lead wire 18 consists of a round wire 19 and an expanded part 20. The round wire 19 serving as a single conductor part is made up of a silver wire having a diameter of 30 ym. The expanded part 20 serving as an opposing electric conductor part is formed by expanding an end of the round wire 19 into the shape of a circular truncated cone with a bottom diameter of 700 urn. The bottom face of the expanded part 20 is located opposite to the electrode (not shown) of the silicon chip 17 as shown in Figure 7. The expanded part 20 is soldered to the silicon chip 17 via a third solder layer 21. The outer periphery of the expanded part 20 is covered with a periphery solder part 22 as shown in Figure 7, wherein the periphery solder part 22 and the third solder layer 21 are fused together into a single element and thus fused to the silicon chip 17. The first solder layer 14 has a ternary composition of Pb : Sn : Sb = 70 : 27 : 3, and the second, and third solder layers 16 and 21 and periphery solder part 22 have a ternary composition of Pb : Sn : Ag = 95.5 : 3 : 1.5 so that the solder having the former composition has a flux temperature {liquidus temperature) of about 2 50C and the solders having the latter composition have a flux temperature of about 310C. Coefficients of linear expansion of the elements described above are as follows: 6.7 (circuit substrate 12), 15.6 [interconnection conductor 13), 27 (first solder layer 14), 17.7 (tab 15), 29 (second solder layer 16, , third solder layer 21, periphery solder part 22), 2.46 {silicon chip 17), and 19.1 (round wire 19, expanded part 20) wherein these values are expressed in units of 10" (1/K). A typical process for producing the semiconductor device 11 is as follows: First, a solder pellet is placed between a tab 15 and a silicon chip 17. Then, a lead wire 18 is disposed on the silicon chip 1? so that the expanded part 20 of the lead wire 18 faces the plate electrode (not shown) formed on the silicon chip 17, and a solder ball is placed between the silicon chip 17 and the expanded part 20 of the lead wire 18. These elements are then put into a furnace so as to heat these elements thereby fusing the solder pellet and the solder ball so that the silicon chip 17 is soldered to the tab 15 via the second solder layer 16, and the expanded part 20 of the lead wire 18 is soldered to the silicon chip via the third solder layer 21. The expanded part 20 of the lead wire 18 is covered with the fused solder layer, and this part of the solder layer becomes the periphery solder part 22 when solidified. The tab 15, the silicon chip 17, and the lead wire 18 combined together with solder are placed on a circuit substrate 12 in such a manner that the tab 15 is located at a predetermined position of the circuit substrate 12, and put with other electric components (not shown) into the furnace again so as to heat these elements thereby fusing the first solder layer 14. Then, these elements are cooled and thus the tab 15 is soldered to the interconnection conductor 13. This is a typical construction of a conventional , semiconductor device 11 designed to control an AC generator for a car. As described earlier, the output voltage of the AC generator 1 is detected, and if the detected voltage is lower than the predetermined value, the power transistor 306 (refer to Figure 8) is turned on thereby supplying a field current to the field coil 102 (Figure 8) of the AC generator via the lead wire 18 and thus raising the output voltage of the AC generator 1. On the other hand, if the detected voltage is higher than the predetermined value, the power transistor 306 is turned off thereby shutting off the field current and thus lowering the output voltage of the AC generator 1 . Each time the power transistor 306 is turned on and off, a current flows through the silicon chip 17 acting as the suppression diode 307. In this way, the power transistor 306 is turned on and off as frequently as a few ten times per second, and the corresponding current flows through the suppression diode (silicon chip 17) so frequently. If the revolving speed or the load of an engine changes, a corresponding change occurs in the ratio of the off-state time duration relative to the time duration of one cycle (duty ratio) . As a result, the current flowing through the silicon chip 17 also changes. Furthermore, when the engine is started, a current begins to flow through the silicon chip 17 and the temperature of the silicon chip 17 goes up quickly from room temperature. The purpose of the tab 15 disposed between the silicon chip 17 and the electrical conductor 13 is to absorb the heat generated transiently in the silicon chip 17 and transfer the heat into the circuit substrate 12 and further to a cooling plate {not shown) disposed on the circuit substrate 12 thereby preventing a quick increase in the temperature of the silicon chip 17. In the conventional semiconductor device 11 described above, the first solder layer 14 between the interconnection conductor 13 and the tab 15, the second solder layer 16 between the tab 15 and the silicon chip 17, and the third solder layer 21 between the silicon chip 17 and the expanded part 20 have a certain thickness determined by the balance between the weight of elements placed on the solder and the surface tension of the melted solder. Thus, there are rather large variations in the thickness of the solder layers. The above-described turning on and off operation of the silicon chip 17 imposes high-frequency heat cycles upon the semiconductor device 11 which includes various elements such as the interconnection conductor 13, the periphery solder part 22, etc., having different coefficients of linear expansion as descried above. As a result, in particular when the solder layers have a small thickness, shearing strain occurs in the first solder layer 14, the second solder layer 16, the third solder layer 21, and the periphery solder part 22. Particularly large shearing strain occurs in the periphery portion of each solder layer (points B, C, D in Figure 7), and cracks are produced in these portions. Cracks in the solder layers can expand from the outer parts into inner parts. Thus, the thermal conduction decreases whereas the electric resistance increases. In the worst case, a conduction failure occurs in the electric circuit, and the Joule heat generated in the silicon chip 17 can also , induce thermal braking owing to degradation in the heat removal ability due to the reduction in the effective solder contact area. Since the diameter of the round wire portion 19 of the lead wire 18 is as small as 30 [im, one end of the lead wire 18 is expanded to a diameter of 700 m thereby-forming the expanded part 20 having a large soldering area which is soldered, together with the per iphery solder part 22, to the silicon chip 17. However, even such an expanded part cannot provide a large enough soldering area and thus the conventional semiconductor device still has a serious problem relating to the cracking in the solder layers especially in the area near point D. SUMMARY OF THE INVENTION It is a general object of the present invention to solve the problems described above. More specifically, it is an object of the present invention to provide a semiconductor device having high reliability that no longer has problems relating to cracks in solder. It is ,. another object of the present invention to provide a method of produ.Gla semiconductor device that has high reliability and thus no longer has problems relating to cracks in solder. In order to achieve the above objects, according to one aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that the thickness of the solder layer is greater than 25 Mm. According to another aspect of the invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that —-'- ~ the thickness of the solder layer is in the range from 25 [im to 70 Mm. According to a further aspect of the invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that: a protruding part is formed at least either on the opposing electric conductor part or on the plate electrode, wherein the protruding part is disposed at a location opposite to an corresponding element or protruding parts are disposed opposite to each other; and According to still another aspect of the invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that: a protruding part is formed at least either on the opposing electric conductor part or on the plate electrode, wherein the protruding part is disposed at a location opposite to an corresponding element or protruding parts are disposed opposite to each other; and the thickness of the solder layer is in the range from 25 \im to 70 \im. According to another aspect of the invention, there is provided a semiconductor device comprising: an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, the first surface being connected to the "interconnection conductor via a first solder layer; and a semiconductor chip, the semiconductor chip being connected to the second surface of the intervening element via a second solder layer so that the intervening element absorbs the heat generated in the semiconductor chip; the semiconductor device being characterized in that the semiconductor device includes at least either a first protruding part or a second protruding part, the first protruding part being formed at least either on the interconnection conductor or on the first surface of the intervening element, the first protruding part having a predetermined protruding height, the first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parts being located at positions opposite to each other so that the first solder layer has a thickness greater than 2 5 iim, the second protruding part being formed at least either on the second surface of the intervening element or on the semiconductor chip, the second protruding part having a predetermined protruding height, the second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions opposite to each other so that said second solder layer has a thickness greater than L D Jim. According to still another aspect of the invention, there is provided a semiconductor device comprising: an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, the first surface being connected to the interconnection conductor via a first solder layer; and a semiconductor chip, the semiconductor chip being connected to the second surface of the intervening element via a second solder layer so that the intervening element absorbs the heat generated in the semiconductor chip; the semiconductor device being characterized in that the semiconductor device includes at least either a first protruding part or a second protruding part the first protruding part being formed at least either on the interconnection conductor or on the first surface of the intervening element, the first protruding part having a predetermined protruding height, the first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parts being located at positions opposite to each other so that the first solder layer has a thickness in the range from 25 Mm to 70 \|jm,_ the second protruding part being formed at least either on the second surface of the intervening element or on the semiconductor chip, the second protruding part having a predetermined protruding height, the second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions opposite to each other so that the second solder layer has a thickness in the range from 25 Mm to 70 \|jm. According to a further aspect of the invention, there is provided a method of producing a semiconductor device including the steps of: forming a solder layer between a plate electrode on a semiconductor chip and an opposing electric conductor part of an electric conductor disposed opposite to the plate electrode; and soldering the opposing electric conductor part to the plate electrode via the solder layer; the method being characterized in that the method compri sing the steps of: (a) forming a protruding part at least either on the plate electrode or on the opposing electric conductor part so that the protruding part has a predetermined protruding height; (b) placing the electric conductor and the semiconductor chip so that the protruding part is oppos ite to the corresponding element or the other protruding part, and then placing a solder material between said plate electrode and said opposing electric conductor part; and (c) fusing the solder material while applying a predetermined pressure so that the protruding part and the corresponding element or the other protruding part are pressed against each other, and then solidifying the solder material thereby forming the solder layer having a thickness greater than 25 pm. According to a further aspect of the invention, there is provided a method of producing a semiconductor device including the steps of: forming a solder layer between a plate electrode on a semiconductor chip and an opposing electric conductor part of an electric conductor disposed opposite to the plate electrode; and soldering the opposing electric conductor part to the plate electrode via the solder layer; the method being characterized in that the method comprising the steps of: (a) forming a protruding part at least either on the plate electrode or on the opposing electric conductor part so that the protruding part has a predetermined protruding height; (b) placing the electric conductor and the semiconductor chip so that the protruding part is opposite to the corresponding element or the other protruding part, and then placing a solder material between the plate electrode and the opposing electric conductor part; and (c) fusing the solder material while applying a predetermined pressure so that the protruding part and the corresponding element or the other protruding part are pressed against each other, and then solidifying the solder material thereby forming the solder layer having a thickness in the range from 25 [jm to 70 jim. According to a further aspect of the invention, there is provided a method of producing a semiconductor device, comprising the steps of: placing an electrically "onductive intervening element having a first surface on its one side and a second surface on the opposite side for absorbing the heat generated in a semiconductor chip □ etueen the semiconductor chip and an interconnect ion conductor formed on a circuit substrate; connecting the first surface of the intervening element to the interconnection conductor via a first solder layer; and connecting the second surface of the intervening element , to .the semiconductor chip via a second solder layer; the method being characterized in that the method further comprising at least either the step (a) described below or the step (b) described below: {a) forming a first protruding part at least either on the interconnection conductor or on the first surface of the intervening element; placing the intervening element so that the first protruding part is located opposite to the corresponding element or the other first protruding part; placing a solder material between the interconnection conductor and the intervening element; fusing the solder material while applying a predetermined pressure so that the first protruding part and the corresponding element or the other first protruding part are pressed against each other; and then solidifying the solder material; thereby forming the first solder layer having a thickness greater than 25 \im; (b) forming a second protruding part at least either on the second surface of the intervening element or on the semiconductor chip; placing the semiconductor chip so that the second protruding part is located opposite to the corresponding element or the other second protruding part; placing a solder material between the intervening element and the semiconductor chip; fusing the solder material while applying a predetermined pressure so that the second protruding part and the corresponding element or the other second protruding part are pressed against each other; and then solidifying the solder material; thereby forming the second solder layer having a thickness greater than 25 [im. According to a further aspect of the invention. there is provided a method of producing a semiconductor device, comprising the steps of: placing an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side for absorbing the heat generated in a semiconductor chip between the semiconductor chip and an interconnection conductor formed on a circuit substrate; connecting the iirst surface of the intervening element to the interconnection conductor via a first solder layer; and connecting the second surface of the intervening element to the semiconductor chip via a second solder layer; the method being characterized in that the method further comprising at least either the step (a) described below or the step (b) described below: (a) forming a first protruding part at least either on the interconnection conductor or on the first surface of the intervening element; placing the intervening element so that the first protruding part is located opposite to the corresponding element or the other first protruding part; placing a solder material between the interconnection conductor and the intervening element; fusing the solder material while applying a predetermined pressure so that the first protruding part and the corresponding element or the other first protruding part are pressed against each other; and then solidifying the solder material; thereby forming the first solder layer having a thickness in the range from 25 ym to 70 pm; (b) forming a second protruding part at least either on the second surface of the intervening element or on the semiconductor chip; placing the semiconductor chip so that the second protruding part is located opposite to the corresponding element or the other second protruding part; placing a solder material between the intervening element and the semiconctor chip; fusing the solder material while applying a pretermined pressure so that the second protruding part and the corresponding element or the other second protruding part are pressed against each other; and then solidiiying the solder material; thereby forming the second solder layer having a thickness in the range from 25 µm to 70 µm. Accordingly the present invention provides a semiconductor device comprising; an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, said first surface being connected to said interconnection conductor via a first solder layer, and a semiconductor chip, said semiconductor chip being connected to the second surface of said intervening element via a second solder layer so that said intervening element absorbs the heat generated in said semiconctor chip; said semiconductor device being characterized in that said semiconductor device comprises at least either a first protruding part or a second protruding part, said first protruding part being formed at least either on said interconnection conductor or on the first surface of said intervening element said first protmding part having a predetermined protruding height, said first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parts being located at positions opposite to each other so that said first solder layer has a thickness greater than 25 µm, said second protruding part being formed at least either on the second surface of said intervening element or on said semiconductor chip, said second protruding part having a predtermined protruding height, said second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions oppoite to each other so that said solder layer has a thickness greater than 25 µm With reference to accompanying drawing, in which; Fig. 1 is a cross-sectional view illustrating main parts of a semiconductor device according to a first embodiment of the present invention; Fig. 2 is a plan view of a copper tab used in the semiconductor device according to the first embodiment of the present invention; Fig. 3A is a plan view illustrating a lead wire used in a semiconductor device according to the first embodiment of the present invention; Fig. 3B is a side view illustrating the lead wire used in the semiconductor device according to the first embodiment of the present invention; Fig. 4 illustrates the relationship between the thickness of a solder layer of the invention and the life in units of cycles, and also illustrates the gradient of the above graph; Fig 5 A is a plan view illustrating a lead wire of a semiconductor device according to a second embodiment of the present invention; Fig 5B is a side view illustrating the lead wire of the semiconductor device according to the second embodiment of the present invention; Figure 6A is a plan view illustrating a lead wire of a semiconductor device according to a third embodiment of the present invention; Figure 6B is a side view illustrating the lead wire of the semiconductor device according to the third embodiment of the present invention; Figure 7 is a cross-sectional view illustrating main parts of a conventional semiconductor device; and Figure 8 is a circuit diagram of a controller including a semiconductor device, for controlling an AC generator for use in a car. DESCFIPTION OF THE PREFERRED EMBODIMENTS EMBODIMENT Figure 1 is a cross-sectional view illustrating main parts of a semiconductor device according to a first embodiment of the present invention. Figure 2 is a plan view of a copper tab used in the semiconductor device according to the first embodiment of the present invention. Figures 3A and 3B are a plan view and a side view, respectively, illustrating an end portion of a lead wire used in the semiconductor device according to the first embodiment of the present invention. In these figures, a circuit substrate 12, an interconnection conductor 13, and a silicon chip M are similar to those described earlier in connection with the conventional technique, and thus these elements are not described here again. A copper tab 31 consists of a main part 32 of the tab, downward-protruding parts 33, and an upward-protruding part 34. The dimensions of the main part 32 of the tab are 2.2 mm 2.2 mm in sides U (refer to Figure 2) and 1.8 mm in height A. The downward-protruding parts 33 protrude from four different locations of the lower surface (first surface) of the main part 32 of the tab wherein these downward-protruding parts 33 are integral with the main part 32, as shown in Figure 1. The size and positions are 0.65 mm in V, 0.15 mm in W, and 50 lm in height h as shown in Figure 2. The upward-protruding part 34 protrudes from a central part of the upper surface of the main part 32 of the tab wherein the upward-protruding part 34 is integral with the main part 32. The dimensions of the upward-protruding part 34 are 0.9 msn 0.9 mm in both sides X end 50 [im in height. The total height of the copper tab 31 is the sum of the height A of the main part 32, and the heights {hx2) of upward- and downward-protruding parts 33 and 34, which becomes 1.9 mm. The main part 32 of the tab serves as the intervening element of the invention, and the downward-and upward-protruding parts 33 and 34 serve as the first and second protruding parts, respectively, of the invention, The lead wire 35 consists of a silver wire 36, a circular truncated cone 37, and a protrusion 38. The circular truncated cone 37 is formed by expanding an end of the silver wire 36 with a diameter of 30 urn into the shape of a circular truncated cone with a bottom diameter dl of 700 Mm. The bottom face of the circular truncated cone 37 faces the silicon chip 17. The protrusion 38 Is an integral part of the circular truncated cone 37 and is formed by protruding a central part of the bottom of the circular truncated cone 37. The diameter d2 of the protrusion 38 is 400 pm and the height h is 50 pm. The lead wire 35 serves as the electric conductor and the single conducting wire of the invention, and the silver wire 36 serves as the single conductor part. The circular truncated cone 37 serves as the opposing electric conductor part, and the protrusion 38 serves as the protruding part of the invention. The lower surface, or the first surface, of the main part 32 of the copper tab 31 is soldered to the interconnection conductor 13 via a first solder layer 39. The plate electrode disposed on the lower surface of the silicon chip 17 is soldered via a second solder layer 40 to the second surface, that is the upper surface, of the main part 32 of the copper tab 31. The circular truncated cone 37 of the lead wire 35 is soldered to the silicon chip 17 via a third solder layer 41. A reinforcing solder layer 42 serving as a covering element covers the outer peripheries of the third solder layer 41 and the circular truncated cone 37 so that the strength of the soldering between the lead wire 35 and the silicon chip T7 is reinforced. The coefficients of linear expansion and other physical properties of the first solder layer 39, the second solder layer 40, the third solder layer 41, and the reinforcing solder layer 42 are similar to those of the first solder layer 14, the second solder layer 16, the third solder layer 21, and the periphery solder part 22 employed in the conventional technique described above. The semiconductor device having the structure described above can be produced by a process similar to that used in the above-described conventional technique except that the processing step of soldering the copper tab 31 to the silicon chip 17 and the lead wire 35 to the silicon chip 17, and also the processing step of soldering the assembly of the silicon chip 17 and the copper tab 31 to the interconnection conductor 13 are performed in a furnace while applying a proper pressure to the elements thereby forming the solder layers. Thus, in this first embodiment, the application of the proper pressure during the soldering processes ensures that the thicknesses of solder Layers between the downward-protruding parts 33 and the interconnection conductor 13, between the upward-protruding part 34 and the silicon chip 17, and between the silicon chip 17 and the protrusion 38 fall within a small range from 0 to 5 \im, and also ensures that the thicknesses of the solder layers at the soldering portions E, F, and G fall within a small range from 50 pm to 55 pm which is equal to the sum of the former thickness of the solder layers and a thickness 50 Mm of the downward-protruding parts 33, the upward-protruding part 34 or the protrusion 38. The former thicknesses of the solder layers become substantially zero if the above-described pressure is large enough. In this case, the thicknesses of the remaining parts of the solder layers become about 50 pm. If the pressure becomes lower, the variation in the thickness of the solder layers becomes greater than 5 urn and thus the thicknesses of the solder layers will be in the range from 50 to 55 [am. In Figure 4, the curve X illustrates the life as a function of the thickness of the solder layer, obtained when the semiconductor device constructed in the above-described manner is subjected to the temperature cycle test from -40t to +160t, wherein the thickness of the solder layer is changed by changing the height h of the protrusion 38 formed on the circular truncated cone 37. The life is defined by the number of temperature cycles at which a crack finally appears at the soldering part G. The curve Y in Figure 4 is a plot of the gradient of the curve X {the ratio of the change in the life to the change in the thickness of the solder). As represented by the curve X of Figure 4, the strain due to the stress induced in the solder layer by the heat cycles decreases and thus the life cycle increases with the increasing thickness of the solder layer. The life cycle reaches a saturated value when the thickness of the solder layer becomes about 70 \|jm. On the other hand, the curve Y increases with the thickness of the solder layer, and reaches a maximum value at a thickness of about 25 Mm and thereafter the curve Y decreases gradually. This means that it is desirable to increase the thickness of the solder layer at least up to about 25 \|im because the life cycle increases at a greater ratio relative to the increasing ratio of the thickness of the solder layer until the thickness of the solder layer reaches 25 [im. However, in the other hand, if the thickness of the solder layer is increased, the electric and thermal resistances also increase because the electric and thermal resistivities of the solder layer are cons.iderably greater than those of the copper tab 31 and the silver lead wire 35. As a result, it becomes difficult to effectively transfer the heat generated in the silicon chip 17 to other parts, for example the copper tab 31. From this viewpoint, the thickness of the solder layer should not be too large. Therefore, it is desirable that the thickness of the solder layer be greater than 25 urn although the electrical and thermal resistances increase to a certain extent. However, if the thickness of the solder layer is increased beyond 70 \|im, the electrical and thermal resistances become too large while the life cycle is saturated. Thus, from the overall viewpoint including the thermal and electrical resistances, it is desirable that the thickness of the solder layer be in the range from 25 (im to 70 pm. As described above, when soldering between the copper tab 31 and the silicon chip 17, between the silicon chip 17 and the lead wire 35, and between the copper tab 31 and the interconnection conductor 13, is performed, solders are fused while applying a pressure to the elements so that these elements are pressed against each other. Therefore, if the height h of each protruding part 33, 34, and 38 is set to a proper value in the range from 25 pm to 70 pm, then the solder layer disposed between the downward-protruding parts 33, the upward-protruding part 34, or the protrusion 38 and the corresponding element has a thickness near zero. On the other hand, if the height h of each protruding part is set to a proper value in the range 25 \xm to 65 pm, it is possible to have a thickness of the solder layer in the range from 0 to 5 \|jm. Furthermore, if it is desirable to ease the requirements of thickness uniformity of the solder layers to a wider range of 0 to 15 Mm- the height of each protruding part should be set to a proper value in the range from 25 [im to 55 Mm. As described above, by setting the thickness of the solder layers to a proper value, it is possible to expand the life of the semiconductor device to a desired value without having cracks in soldering parts E, F, and G in the peripheral regions of solder layers. Thus, in this first embodiment, the thicknesses of the first solder layer 39 disposed between the copper tab 31 and the interconnection conductor 13, the second solder layer 40 disposed between the copper tab 31 and the silicon chip 17, and the third solder layer 41 disposed between the silicon chip 17 and the lead wire 35 are each set to a value greater than 25 pm, so that the shearing strain induced in the solder layers during the heat cycles can be reduced thereby suppressing the generation of cracks and thus improving the reliability of the device. Furthermore, the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are set to a value in the range from 25 pm to 70 Mm so that not only the shearing strain in the solder layers arising during the heat cycles is reduced and thus the generation of cracks is suppressed, but also the increases in the electrical and thermal resistances of the solder layers are suppressed. As a result, the reliability and electric characteristics of the semiconductor device are improved. Furthermore, the upward-protruding part 34 and the protrusion 38 are formed on the copper tab 31 and the lead wire 35, respectively, at locations opposite to the plate electrodes of the silicon chip 17, and the downward-protruding parts 33 are formed on the copper tab 31 at locations opposite to the interconnection conductor 13, thereby ensuring that the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are easily controlled to desired values. The heights of the downward-protruding parts 33, the upward-protruding part 34, and the protrusion 38 are each set to a value greater than 25 \im thereby ensuring that the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are easily controlled to a desired value greater than 25 urn. Furthermore, the heights of the downward-protruding parts 33, the upward-protruding part 34, and the protrusion 38 are each set to a value in the range from 25 \iw. to 70 Vim thereby ensuring that the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are easily controlled to a desired value in the range from 25 Mm to 70 urn. An end portion of the silver wire 36 of the lead wire 35 is expanded into the shape of a circular truncated cone thereby forming the circular truncated cone 37 and thus expanding the soldering area between the lead wire and the plate electrode of the silicon chip 17. As a result, the strength of soldering is increased, and the reliability of the device is improved. Furthermore, this technique prevents generation of cracks in the solder layers even when materials having great differences in the coefficients of linear expansion are employed. Furthermore, the reinforcing solder layer 42 is disposed around the third solder layer 41 and the circular truncated cone 37 so as to increase the soldering strength between the silicon chip 17 and the lead wire 35. As a result, the reliability of the semiconductor device is enhanced. Furthermore, it is also possible to prevent getieration of cracks in the solder layer even when materials having great differences in the coefficients of linear expansion are employed. Furthermore, the upward-protruding part 34 is formed on the upper surface of the main part 32 of the copper tab 31, the protrusion 38 is formed on the end face of the circular truncated cone 37 of the lead wire 35, a solder material is disposed between the upper surface of the main part 32 of the tab and the plate electrode on the lower surface of the silicon chip 17, a solder material is also disposed between the plate electrode on the upper surface of the silicon chip 17 and the lower face of the circular truncated cone 37 of the lead wire 35, and then those solder materials are fused while applying a proper pressure to the elements so that both the copper tab 31 and the lead wire 35 are pressed against the silicon chip 17. Afterward, the solder materials are solidified thereby forming the solder layers having a thickness greater than 25 yinv. As s result, the shearing strain in the solder layers arising during the heat cycles is reduced and thus generation of cracks is suppressed. Therefore, it is possible to obtain a semiconductor device having high reliability. Furthermore, the downward-protruding parts 33 are formed on the main part 32 of the copper tab 31, and the main part 32 of the tab is placed at a predetermined location on the circuit substrate 12 via a solder material, and thereafter the solder material is fused while applying a proper pressure to the elements. Then the solder material is solidified so that a solder layer having a thickness greater than 25 \|im is obtained. As a result, the shearing strain in the solder layers arising during the heat cycles is reduced and thus generation of cracks is suppressed. Thus, a semiconductor device having high reliability can be obtained. Furthermore, if the process is control led so that the thickness of the above-described solder layer falls within the range from 25 Mm to 70 Mm, then not only the shearing strain in the solder layers arising during the heat cycles is reduced and thus the generation of cracks is suppressed, but also the increases in the electrical and thermal resistances of the solder layer are suppressed. As a result, a semiconductor device having high reliability and excellent electric characteristics can be obtained. EMBODIMENT 2 Figures 5A and 5B are a plan view and a side view, respectively, illustrating an end portion of a lead wire of a semiconductor device according to a second embodiment of the present invention. The lead wire 51 serving as the single conducting wire has three small and circular protrusions 52 having a height of 50 Mn and a diameter of 130 Mm protruding from a central portion of the surface, opposite to the silicon chip 17, of the circular truncated cone 37 wherein the three protrusions 52 are integral with the circular truncated cone 37 and located so that each protrusion 52 is inscribed in a circle having a diameter d2 of 400 Mm as shown in Figure 5A, Because the diameter of each protrusions 52 is small, it is easy to form these protrusions 52 so that they have a large protruding height. EMBODIMENT 3 Figures 6A and 6B are a plan view and a side view, respectively, illustrating an end portion of a lead wire of a semiconductor device according to a third embodiment of the present invention. A lead wire 61 has a protrusion 62 with a spherical surface protruding from a central part of a circular truncated cone 37 wherein the protrusion 62 is formed as an integral element of the circular truncated cone 37. The protrusion 62 has a diameter d2 of 400 pm and a height h of 50 ixm. As can be readily understood, this third embodiment also has advantages similar to those of the previous embodiments. In the first embodiment described above, the protrusion 38 serving as the protruding part of the invention is formed on the circular truncated cone 37 of the lead wire 35. Alternatively, the protrusion 38 may also be formed on the plate electrode of the silicon chip 17. Furthermore, a protrusion may formed on both the circular truncated cone and the plate electrode so that the sum of the protruding heights of both protrusions and the thickness of solder disposed between these protrusions falls within the range from 25 jim to 70 urn. Although the copper tab 31 is employed as the intervening element in the first embodiment described above, the semiconductor chip may be directly soldered to the interconnection conductor 13 without using the copper tab 31. In the first embodiment described above, the downward-protruding parts 33 serving as the first protruding parts are formed on the main part 32 of the intervening element, and the upward-protruding part 34 serving as the second protruding part is formed on the intervening element. Alternatively, these protruding parts may also be formed on the interconnection conductor 13 and the plate electrode (not shown) disposed on the lower surface of the semiconductor chip 17, respectively. Furthermore, protruding parts may also be formed on both the interconnection conductor 13 and the lower surface of the copper tab 32 thereby forming the first protruding parts, or otherwise protruding parts may also be formed on both the upper surface of the copper tab 32 and the electrode disposed on the lower surface of the semiconductor chip 17 thereby forming the second protruding parts, so that the sum of the protruding heights of both the first and second protruding parts and the thickness of solder disposed between these protruding parts falls within the range greater than 25 prn or within the range from 25 \xm to 70 [im. The term "electric conductor" is used here as a generic expression to broadly denote electric conductors such as the interconnection conductor 13, the main part 32 of the tab serving as the intervening element, the lead wires 35 and 51, and the lead conductor 61. Furthermore, "the opposing electric conductor part" also includes a part of the electric conductor opposite to the corresponding element. Furthermore, the term "protruding part" is used here to broadly denote protruding parts such as the upward-protruding part 34, the protrusion 38, the small protrusions 52, and the protruding part 63 with a spherical surface . The term "solder layer" also includes the second and third solder layers. In each embodiments described above, a silicon chip 17 is served as the semiconductor chip. Alternatively, a germanium chip and other element, that is the power transistor 306, may be served as the semiconductor chip. The solder materials for the solder layers and the material for the single lead wire are not limited to those descried in the above embodiments. Various materials may also be employed without departing from the spirit and scope of the present invention. Furthermore, the present invention is not limited to the semiconductor device designed to act as a controller for controlling an AC generator used in a car, and the present invention is also applicable to various semiconductor devices. WE CLAIM: 1. A semiconductor device comprising; an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, said first surface being connected to said interconnection conductor via a first solder layer, and a semiconductor chip, said semiconductor chip being connected to the second surface of said intervening element via a second solder layer so that said intervening element absorbs the heat generated in said semiconductor chip; said semiconductor device being characterized in that said semiconductor device comprises at least either a first protruding part or a second protruding part, said first protruding part being formed at least either on said interconnection conductor or on the first surface of said intervening element, said first protruding part having a predetermined protruding height, said first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parte being located at positions opposite to each other so that said first solder layer has a thickness greater than 25 µm, said second protruding part being formed at least either on the second surface of said intervening element or on said semiconductor chip, said second protruding part having a predetermined protruding height, said second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions opposite to each other so that said solder layer has a thickness greater than 25 µm. 2. The semiconductor device according to claim 1, wherein the protruding height of said first and/or second protruding part is greater than 25µm. 3. The semiconductor device according to claim 1 wherein the thickness of said first and/or second solder layer is in the range µm 25µm to 70 µm. 4. The semiconductor device according to claim 3, wherein the protruding height of said first and/or second protruding part is in the range µm 25 µm to 70 µm. 5. The semiconductor device according to any one of the claims 1 to 4, wherein said intervening element is made of copper or a copper-based alloy, and said semiconductor chip is a silicon chip. 6. A method of producing a semiconductor device according to claim 1, comprising the steps of placing an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side for absorbing the heat generated in a semiconductor chip between said semiconductor chip and an interconnection conductor formed on a circuit substrate; connecting the first surface of said intervening element to said interconnection conductor via a first solder layer; and connecting the second surface of said intervening element to said semiconductor chip via a second solder layer; said method being characterized in that said method further comprising at least either the step (a) described below or the step (b) described below: (a) forming a first protruding part at least either on said interconnection conductor or on the first surface of said intervening element; placing said intervening element so that said first protruding part is located opposite to the corresponding element or the other first protruding part; placing a solder material between said interconnection conductor and said intervening element, fusing said solder material while applying a predetermined pressure so that said first protruding part and the corresponding element or the other first protruding part are pressed against each other, and then solidifying said solder material; thereby forming said first solder layer having a thickness greater than 25µm. (b) forming a second protruding part at least either on the second surface of said intervening element or on said semiconductor chip; placing said semiconductor chip so that said second protruding part is located opposite to the corresponding element or the other second protruding part; placing a solder material between said intervening element and said semiconductor chip; fusing said solder material while applying a predetermined pressure so that said second protruding part and the corresponding element or the other second protruding part are pressed against each other; and then solidifying said solder material; thereby forming said second solder layer having a thickness greater than 25 µm. 7. The method according to claim 6, wherein the thickness of said first and/or second solder layer is formed in the range from 25 µm to 70 µm in the step (a) and/or or the step (b). 8. A semiconductor device, substantially as herein described, with reference to figures 1 to 6B of the accompanying drawings. 9. A method of producing a semiconductor device, substantially as herein described, with reference to figures 1 to 6B of the accompanying drawings.

Full Text

The present invention relates to a semiconductor device including a soldered semiconductor chip used for example in a controller of an AC generator installed for example on a car, and also to a method of producing such a semiconductor device.
Description of the Related Art
First, the circuit configuration of a controller including a semiconductor device as one of its components, designed to control an AC generator for use in a car will be described. Figure 8 is a circuit diagram of such a controller for controlling an AC generator for use in a car. As shown in Figure 8, the AC generator 1 for use in a car includes a three-phase armature coil 101 for example in the star-connected form and a field coil 102. A rectifier 2 is for example a full-wave rectifier including a three-phase full-wave rectifier consisting of six diodes, a rectifying output terminal 201, a ground terminal 202, and three input terminals 203 each of which is connected to one end of each armature coil 101 of the AC generator 1 .
A semiconductor device designed to act as a voltage regulator 3 is composed of dividing resistors 301 and 302, a Zener diode 303, a control transistor 304, a base bias resistor 305, a power transistor 306, a suppression diode 307, and a capacitor 308. The dividing resistors 301 and 302 are connected in series to each

other. The other end of the resistor 301 is connected to the positive terminal of a battery 4 described later, and the other end of the resistor 302 is grounded wherein the rectifying output terminal 201 of the rectifier 2 is also connected to the positive terminal of a battery 4 which will be described later so that the voltage generated by the generator may be detected. The cathode of the Zener diode 303 is connected to a node 301a via which the dividing resistors 301 and 302 are connected to each other. The base of the control transistor 304 is connected to the anode of the Zener diode 303, the collector of the control transistor 304 is connected to the base of the power transistor 306, and the emitter of the control transistor is grounded.
The base of the power transistor 306 is connected to the positive terminal of the battery 4 via the base bias resistor 305 and a key switch, and the base of the power transistor 306 is also connected to the collector of the control transistor 304. The collector of the power transistor 306 is connected to the output terminal 201 of the rectifier 2 via the field coil 102 of the AC generator 1, and the emitter of the power transistor 306 is grounded. The suppression diode 307 is connected in parallel to the field coil 102, that is, the anode of the suppression diode 307 is connected to the collector of the power transistor 306, and the cathode is connected to the output terminal 201 of the rectifier 2.
The battery 4 is connected between the output terminal 201 of the rectifier 2 and ground. The key switch 5 is connected between the positive terminal of the battery 4 and the other end of the base bias resistor 305

disposed in the voltage regulator 3, A starter switch 5 and a starter 7 are connected in series between the positive and negative terminals of the battery 4. The controller is formed with the rectifier 2, the voltage regulator 3, the battery 4, the key switch 5, the starter switch 6, and the starter 7.
The operation of the controller constructed in the above-described manner will be described below. If the key switch 5 is turned on, a 12V terminal voltage of the battery 4 is applied to the Zener diode 303 via the resistor 301. However, the terminal voltage is not so high to turn on the Zener diode 303, and therefore, the control transistor 304 remains in an off-state. As a result, a current flows from the battery 4 via the base bias resistor 305 into the base of the power transistor 306, whereby the power transistor 306 is turned on. Thus, a field current flows from the battery 4 into the field coil 102. In this situation, if the starter switch 6 is turned on, the starter 7 is driven by the battery 4 and rotates. As a result, a mechanism (not shown) linked to the starter 7 starts to operate. The AC generator 1 is driven by this mechanism and the AC generator 1 starts to generate electric power, and thus the output voltage of the AC generator 1 rises.
While the output voltage is less than a predetermined value, for example 14,4 V, both the Zener diode 303 and the control transistor 304 remain in the off-state, and thus the power transistor 306 is maintained in the on-state. As a result, the field current flowing through the field coil 102 increases, and the output voltage of the AC generator 1 rises further. If the

, output voltage becomes greater than the predetermined value, for example 14.4 V, then both the Zener diode 303 and the control transistor 304 are turned on, and thus the power transistor 306 is turned off. As a result, the field current decreases, and the output voltage drops. The above operation is repeated and thus the output voltage of the generator is adjusted to 14.4 V by the voltage regulator 3.
When the power transistor 306 is turned off, the current which has been flowing through the field coil T02 until that time is forced to flow through the suppression diode 307 so as to prevent an excessive voltage from appearing across the terminals of the field coil 102. That is, each time the power transistor 306 turns off, a current flows through the suppression diode 307.
The capacitcar 308 is used to smooth a detection voltage obtained by being divided via the dividing resistors 301 and 302.
Among the above-described elements of the controller, the dividing resistors 301 and 302, the Zener diode 303, the control transistor 304, the base bias resistor 305, the power transistor 306, the suppression diode 307 and the capacitor 308 are mounted on a printed circuit board so that a semiconductor device acting as the voltage regulator 3 is formed.
Referring to Figure 7, the structure of the semiconductor device of this type will be described below. Figure 7 is a cross-sectional view illustrating main parts of a conventional semiconductor device acting as a controller for controlling an AC generator for use in a car. In Figure 7, the semiconductor device 11 corresponds

, to the voltage regulator 3 shown in the circuit diagram of Figure 8, and is constructed as follows:
A circuit substrate 12 is made up of ceramic containing about 96 wt% of alumina so that it has a shape of a rectangular plate with a size of about 22 mm (width) .30 mm {length) 0.63 mm (thickness). An interconnection conductor 13 is formed on the circuit substrate 12 by coating a Ag-Pd-based thick conductive material on the circuit substrate 12 by means of a screen printing technique. A first solder layer 14 is formed on the interconnection conductor 13 by dipping the circuit substrate 12 on which the interconnection conductor 13 has been printed into a solder bath. The first solder layer 14 serves to solder the lower face of a tab 15, which will be described later, to the interconnection conductor 13.
The tab 15 serves as an intervening element and is made up of a cubic copper material so that the tab 15 has dimensions of 2.2 mm square and 1.8 mm in height A. A silicon chip 17 serving as the semiconductor chip has a size of 1.6 mm square 0.2 mm in thickness. The silicon chip 17 is a diode corresponding to the suppression diode 307 shown in the circuit diagram of Figure 8. The silicon chip 17 has a plate-shaped electrode (not shown} with a size of 1 mm square on its upper surface, and also has a similar plate-shaped electrode on the lower surface. A second solder layer 15 is formed by heating a solder pellet placed between the tab 15 and the silicon chip 17 so that the solder pellet is melt and thus the bottom face of the silicon chip 17 is soldered to the upper face of the tab via the solder layer 16.
A lead wire 18 serving as a single conducive

. wire corresponds to the lead wire connected to the cathode of the suppression diode 307 shown in the circuit diagram of Figure 8. The lead wire 18 consists of a round wire 19 and an expanded part 20. The round wire 19 serving as a single conductor part is made up of a silver wire having a diameter of 30 ym. The expanded part 20 serving as an opposing electric conductor part is formed by expanding an end of the round wire 19 into the shape of a circular truncated cone with a bottom diameter of 700 urn. The bottom face of the expanded part 20 is located opposite to the electrode (not shown) of the silicon chip 17 as shown in Figure 7.
The expanded part 20 is soldered to the silicon chip 17 via a third solder layer 21. The outer periphery of the expanded part 20 is covered with a periphery solder part 22 as shown in Figure 7, wherein the periphery solder part 22 and the third solder layer 21 are fused together into a single element and thus fused to the silicon chip 17.
The first solder layer 14 has a ternary composition of Pb : Sn : Sb = 70 : 27 : 3, and the second, and third solder layers 16 and 21 and periphery solder part 22 have a ternary composition of Pb : Sn : Ag = 95.5 : 3 : 1.5 so that the solder having the former composition has a flux temperature {liquidus temperature) of about 2 50C and the solders having the latter composition have a flux temperature of about 310C.
Coefficients of linear expansion of the elements described above are as follows: 6.7 (circuit substrate 12), 15.6 [interconnection conductor 13), 27 (first solder layer 14), 17.7 (tab 15), 29 (second solder layer 16,

, third solder layer 21, periphery solder part 22), 2.46 {silicon chip 17), and 19.1 (round wire 19, expanded part 20) wherein these values are expressed in units of 10" (1/K).
A typical process for producing the semiconductor device 11 is as follows: First, a solder pellet is placed between a tab 15 and a silicon chip 17. Then, a lead wire 18 is disposed on the silicon chip 1? so that the expanded part 20 of the lead wire 18 faces the plate electrode (not shown) formed on the silicon chip 17, and a solder ball is placed between the silicon chip 17 and the expanded part 20 of the lead wire 18. These elements are then put into a furnace so as to heat these elements thereby fusing the solder pellet and the solder ball so that the silicon chip 17 is soldered to the tab 15 via the second solder layer 16, and the expanded part 20 of the lead wire 18 is soldered to the silicon chip via the third solder layer 21.
The expanded part 20 of the lead wire 18 is covered with the fused solder layer, and this part of the solder layer becomes the periphery solder part 22 when solidified. The tab 15, the silicon chip 17, and the lead wire 18 combined together with solder are placed on a circuit substrate 12 in such a manner that the tab 15 is located at a predetermined position of the circuit substrate 12, and put with other electric components (not shown) into the furnace again so as to heat these elements thereby fusing the first solder layer 14. Then, these elements are cooled and thus the tab 15 is soldered to the interconnection conductor 13.
This is a typical construction of a conventional

, semiconductor device 11 designed to control an AC generator for a car. As described earlier, the output voltage of the AC generator 1 is detected, and if the detected voltage is lower than the predetermined value, the power transistor 306 (refer to Figure 8) is turned on thereby supplying a field current to the field coil 102 (Figure 8) of the AC generator via the lead wire 18 and thus raising the output voltage of the AC generator 1. On the other hand, if the detected voltage is higher than the predetermined value, the power transistor 306 is turned off thereby shutting off the field current and thus lowering the output voltage of the AC generator 1 . Each time the power transistor 306 is turned on and off, a current flows through the silicon chip 17 acting as the suppression diode 307.
In this way, the power transistor 306 is turned on and off as frequently as a few ten times per second, and the corresponding current flows through the suppression diode (silicon chip 17) so frequently. If the revolving speed or the load of an engine changes, a corresponding change occurs in the ratio of the off-state time duration relative to the time duration of one cycle (duty ratio) . As a result, the current flowing through the silicon chip 17 also changes. Furthermore, when the engine is started, a current begins to flow through the silicon chip 17 and the temperature of the silicon chip 17 goes up quickly from room temperature.
The purpose of the tab 15 disposed between the silicon chip 17 and the electrical conductor 13 is to absorb the heat generated transiently in the silicon chip 17 and transfer the heat into the circuit substrate 12 and

further to a cooling plate {not shown) disposed on the circuit substrate 12 thereby preventing a quick increase in the temperature of the silicon chip 17.
In the conventional semiconductor device 11 described above, the first solder layer 14 between the interconnection conductor 13 and the tab 15, the second solder layer 16 between the tab 15 and the silicon chip 17, and the third solder layer 21 between the silicon chip 17 and the expanded part 20 have a certain thickness determined by the balance between the weight of elements placed on the solder and the surface tension of the melted solder. Thus, there are rather large variations in the thickness of the solder layers.
The above-described turning on and off operation of the silicon chip 17 imposes high-frequency heat cycles upon the semiconductor device 11 which includes various elements such as the interconnection conductor 13, the periphery solder part 22, etc., having different coefficients of linear expansion as descried above. As a result, in particular when the solder layers have a small thickness, shearing strain occurs in the first solder layer 14, the second solder layer 16, the third solder layer 21, and the periphery solder part 22. Particularly large shearing strain occurs in the periphery portion of each solder layer (points B, C, D in Figure 7), and cracks are produced in these portions. Cracks in the solder layers can expand from the outer parts into inner parts. Thus, the thermal conduction decreases whereas the electric resistance increases. In the worst case, a conduction failure occurs in the electric circuit, and the Joule heat generated in the silicon chip 17 can also

, induce thermal braking owing to degradation in the heat removal ability due to the reduction in the effective solder contact area.
Since the diameter of the round wire portion 19 of the lead wire 18 is as small as 30 [im, one end of the lead wire 18 is expanded to a diameter of 700 m thereby-forming the expanded part 20 having a large soldering area which is soldered, together with the per iphery solder part 22, to the silicon chip 17. However, even such an expanded part cannot provide a large enough soldering area and thus the conventional semiconductor device still has a serious problem relating to the cracking in the solder layers especially in the area near point D.
SUMMARY OF THE INVENTION
It is a general object of the present invention to solve the problems described above. More specifically, it is an object of the present invention to provide a semiconductor device having high reliability that no longer has problems relating to cracks in solder. It is ,. another object of the present invention to provide a method of produ.Gla semiconductor device that has high reliability and thus no longer has problems relating to cracks in solder.
In order to achieve the above objects, according to one aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing

electric conductor part, the semiconductor device being characterized in that
the thickness of the solder layer is greater than 25 Mm.
According to another aspect of the invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that —-'-
~ the thickness of the solder layer is in the
range from 25 [im to 70 Mm.
According to a further aspect of the invention, there is provided a semiconductor device comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that:
a protruding part is formed at least either on the opposing electric conductor part or on the plate electrode, wherein the protruding part is disposed at a location opposite to an corresponding element or protruding parts are disposed opposite to each other; and According to still another aspect of the invention, there is provided a semiconductor device

comprising a semiconductor chip having a plate electrode, an electric conductor having an opposing electric conductor part disposed at a location opposite to the plate electrode, and a solder layer disposed between the plate electrode and the opposing electric conductor part, the semiconductor device being characterized in that:
a protruding part is formed at least either on the opposing electric conductor part or on the plate electrode, wherein the protruding part is disposed at a location opposite to an corresponding element or protruding parts are disposed opposite to each other; and
the thickness of the solder layer is in the range from 25 \im to 70 \im.

According to another aspect of the invention, there is provided a semiconductor device comprising: an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, the first surface being connected to the "interconnection conductor via a first solder layer; and a semiconductor chip, the semiconductor chip being connected to the second surface of the intervening element via a second solder layer so that the intervening element absorbs the heat generated in the semiconductor chip; the semiconductor device being characterized in that the semiconductor device includes at least either a first protruding part or a second protruding part,
the first protruding part being formed at least either on the interconnection conductor or on the first surface of the intervening element, the first protruding part having a predetermined protruding height, the first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parts being located at positions opposite to each other so that the first solder layer has a thickness greater than 2 5 iim,
the second protruding part being formed at least either on the second surface of the intervening element or on the semiconductor chip, the second protruding part having a predetermined protruding height, the second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions opposite to each other so that said second solder layer has a thickness greater than

L D Jim.
According to still another aspect of the invention, there is provided a semiconductor device comprising: an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, the first surface being connected to the interconnection conductor via a first solder layer; and a semiconductor chip, the semiconductor chip being connected to the second surface of the intervening element via a second solder layer so that the intervening element absorbs the heat generated in the semiconductor chip; the semiconductor device being characterized in that the semiconductor device includes at least either a first protruding part or a second protruding part
the first protruding part being formed at least either on the interconnection conductor or on the first surface of the intervening element, the first protruding part having a predetermined protruding height, the first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parts being located at positions opposite to each other so that the first solder layer has a thickness in the range from 25 Mm to 70 |jm,_
the second protruding part being formed at least either on the second surface of the intervening element or on the semiconductor chip, the second protruding part having a predetermined protruding height, the second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding

parts being located at positions opposite to each other so that the second solder layer has a thickness in the range from 25 Mm to 70 |jm.
According to a further aspect of the invention, there is provided a method of producing a semiconductor device including the steps of: forming a solder layer between a plate electrode on a semiconductor chip and an opposing electric conductor part of an electric conductor disposed opposite to the plate electrode; and soldering the opposing electric conductor part to the plate electrode via the solder layer; the method being characterized in that the method compri sing the steps of:
(a) forming a protruding part at least either on
the plate electrode or on the opposing electric conductor
part so that the protruding part has a predetermined
protruding height;
(b) placing the electric conductor and the
semiconductor chip so that the protruding part is oppos ite
to the corresponding element or the other protruding part,
and then placing a solder material between said plate
electrode and said opposing electric conductor part; and
(c) fusing the solder material while applying a
predetermined pressure so that the protruding part and the
corresponding element or the other protruding part are
pressed against each other, and then solidifying the
solder material thereby forming the solder layer having a
thickness greater than 25 pm.
According to a further aspect of the invention, there is provided a method of producing a semiconductor device including the steps of: forming a solder layer between a plate electrode on a semiconductor chip and an

opposing electric conductor part of an electric conductor disposed opposite to the plate electrode; and soldering the opposing electric conductor part to the plate electrode via the solder layer; the method being characterized in that the method comprising the steps of:
(a) forming a protruding part at least either on
the plate electrode or on the opposing electric conductor
part so that the protruding part has a predetermined
protruding height;
(b) placing the electric conductor and the
semiconductor chip so that the protruding part is opposite
to the corresponding element or the other protruding part,
and then placing a solder material between the plate
electrode and the opposing electric conductor part; and
(c) fusing the solder material while applying a
predetermined pressure so that the protruding part and the
corresponding element or the other protruding part are
pressed against each other, and then solidifying the
solder material thereby forming the solder layer having a
thickness in the range from 25 [jm to 70 jim.
According to a further aspect of the invention, there is provided a method of producing a semiconductor device, comprising the steps of: placing an electrically "onductive intervening element having a first surface on its one side and a second surface on the opposite side for absorbing the heat generated in a semiconductor chip □ etueen the semiconductor chip and an interconnect ion conductor formed on a circuit substrate; connecting the first surface of the intervening element to the interconnection conductor via a first solder layer; and connecting the second surface of the intervening element

, to .the semiconductor chip via a second solder layer; the method being characterized in that the method further comprising at least either the step (a) described below or the step (b) described below:
{a) forming a first protruding part at least either on the interconnection conductor or on the first surface of the intervening element; placing the intervening element so that the first protruding part is located opposite to the corresponding element or the other first protruding part; placing a solder material between the interconnection conductor and the intervening element; fusing the solder material while applying a predetermined pressure so that the first protruding part and the corresponding element or the other first protruding part are pressed against each other; and then solidifying the solder material; thereby forming the first solder layer having a thickness greater than 25 \im;
(b) forming a second protruding part at least either on the second surface of the intervening element or on the semiconductor chip; placing the semiconductor chip so that the second protruding part is located opposite to the corresponding element or the other second protruding part; placing a solder material between the intervening element and the semiconductor chip; fusing the solder material while applying a predetermined pressure so that the second protruding part and the corresponding element or the other second protruding part are pressed against each other; and then solidifying the solder material; thereby forming the second solder layer having a thickness greater than 25 [im.
According to a further aspect of the invention.

there is provided a method of producing a semiconductor device, comprising the steps of: placing an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side for absorbing the heat generated in a semiconductor chip between the semiconductor chip and an interconnection conductor formed on a circuit substrate; connecting the iirst surface of the intervening element to the interconnection conductor via a first solder layer; and connecting the second surface of the intervening element to the semiconductor chip via a second solder layer; the method being characterized in that the method further comprising at least either the step (a) described below or the step (b) described below:
(a) forming a first protruding part at least either on the interconnection conductor or on the first surface of the intervening element; placing the intervening element so that the first protruding part is located opposite to the corresponding element or the other first protruding part; placing a solder material between the interconnection conductor and the intervening element; fusing the solder material while applying a predetermined pressure so that the first protruding part and the corresponding element or the other first protruding part are pressed against each other; and then solidifying the solder material; thereby forming the first solder layer having a thickness in the range from 25 ym to 70 pm;
(b) forming a second protruding part at least either on the second surface of the intervening element or on the semiconductor chip; placing the semiconductor chip so that the second protruding part is located opposite to

the corresponding element or the other second protruding part; placing a solder material between the intervening element and the semiconctor chip; fusing the solder material while applying a pretermined pressure so that the second protruding part and the corresponding element or the other second protruding part are pressed against each other; and then solidiiying the solder material; thereby forming the second solder layer having a thickness in the range from 25 µm to 70 µm.
Accordingly the present invention provides a semiconductor device comprising; an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, said first surface being connected to said interconnection conductor via a first solder layer, and a semiconductor chip, said semiconductor chip being connected to the second surface of said intervening element via a second solder layer so that said intervening element absorbs the heat generated in said semiconctor chip; said semiconductor device being characterized in that said semiconductor device comprises at least either a first protruding part or a second protruding part, said first protruding part being formed at least either on said interconnection conductor or on the first surface of said intervening element said first protmding part having a predetermined protruding height, said first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parts being located at positions opposite to each other so that said first solder layer has a thickness greater than 25 µm, said second protruding part being formed at least either on the second surface of said intervening element or on said semiconductor chip, said second protruding part having a predtermined protruding height, said second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions oppoite to each other so that said solder layer has a thickness greater than 25 µm
With reference to accompanying drawing, in which; Fig. 1 is a cross-sectional view illustrating main parts of a semiconductor device according to a first embodiment of the present invention;
Fig. 2 is a plan view of a copper tab used in the semiconductor device according to the first embodiment of the present invention;
Fig. 3A is a plan view illustrating a lead wire used in a semiconductor device according to the first embodiment of the present invention; Fig. 3B is a side view illustrating the lead wire used in the semiconductor device according to the first embodiment of the present invention; Fig. 4 illustrates the relationship between the thickness of a solder layer of the invention and the life in units of cycles, and also illustrates the gradient of the above graph;
Fig 5 A is a plan view illustrating a lead wire of a semiconductor device according to a second embodiment of the present invention; Fig 5B is a side view illustrating the lead

wire of the semiconductor device according to the second embodiment of the present invention;
Figure 6A is a plan view illustrating a lead wire of a semiconductor device according to a third embodiment of the present invention;
Figure 6B is a side view illustrating the lead wire of the semiconductor device according to the third embodiment of the present invention;
Figure 7 is a cross-sectional view illustrating main parts of a conventional semiconductor device; and
Figure 8 is a circuit diagram of a controller including a semiconductor device, for controlling an AC generator for use in a car.
DESCFIPTION OF THE PREFERRED EMBODIMENTS EMBODIMENT
Figure 1 is a cross-sectional view illustrating main parts of a semiconductor device according to a first embodiment of the present invention. Figure 2 is a plan view of a copper tab used in the semiconductor device according to the first embodiment of the present invention. Figures 3A and 3B are a plan view and a side view, respectively, illustrating an end portion of a lead wire used in the semiconductor device according to the first embodiment of the present invention. In these figures, a circuit substrate 12, an interconnection conductor 13, and a silicon chip M are similar to those described earlier in connection with the conventional technique, and thus these elements are not described here again.
A copper tab 31 consists of a main part 32 of

the tab, downward-protruding parts 33, and an upward-protruding part 34. The dimensions of the main part 32 of the tab are 2.2 mm 2.2 mm in sides U (refer to Figure 2) and 1.8 mm in height A. The downward-protruding parts 33 protrude from four different locations of the lower surface (first surface) of the main part 32 of the tab wherein these downward-protruding parts 33 are integral with the main part 32, as shown in Figure 1. The size and positions are 0.65 mm in V, 0.15 mm in W, and 50 lm in height h as shown in Figure 2.
The upward-protruding part 34 protrudes from a central part of the upper surface of the main part 32 of the tab wherein the upward-protruding part 34 is integral with the main part 32. The dimensions of the upward-protruding part 34 are 0.9 msn 0.9 mm in both sides X end 50 [im in height. The total height of the copper tab 31 is the sum of the height A of the main part 32, and the heights {hx2) of upward- and downward-protruding parts 33 and 34, which becomes 1.9 mm.
The main part 32 of the tab serves as the intervening element of the invention, and the downward-and upward-protruding parts 33 and 34 serve as the first and second protruding parts, respectively, of the invention,
The lead wire 35 consists of a silver wire 36, a circular truncated cone 37, and a protrusion 38. The circular truncated cone 37 is formed by expanding an end of the silver wire 36 with a diameter of 30 urn into the shape of a circular truncated cone with a bottom diameter dl of 700 Mm. The bottom face of the circular truncated cone 37 faces the silicon chip 17. The protrusion 38 Is

an integral part of the circular truncated cone 37 and is formed by protruding a central part of the bottom of the circular truncated cone 37. The diameter d2 of the protrusion 38 is 400 pm and the height h is 50 pm.
The lead wire 35 serves as the electric conductor and the single conducting wire of the invention, and the silver wire 36 serves as the single conductor part. The circular truncated cone 37 serves as the opposing electric conductor part, and the protrusion 38 serves as the protruding part of the invention.
The lower surface, or the first surface, of the main part 32 of the copper tab 31 is soldered to the interconnection conductor 13 via a first solder layer 39. The plate electrode disposed on the lower surface of the silicon chip 17 is soldered via a second solder layer 40 to the second surface, that is the upper surface, of the main part 32 of the copper tab 31.
The circular truncated cone 37 of the lead wire 35 is soldered to the silicon chip 17 via a third solder layer 41. A reinforcing solder layer 42 serving as a covering element covers the outer peripheries of the third solder layer 41 and the circular truncated cone 37 so that the strength of the soldering between the lead wire 35 and the silicon chip T7 is reinforced.
The coefficients of linear expansion and other physical properties of the first solder layer 39, the second solder layer 40, the third solder layer 41, and the reinforcing solder layer 42 are similar to those of the first solder layer 14, the second solder layer 16, the third solder layer 21, and the periphery solder part 22 employed in the conventional technique described above.

The semiconductor device having the structure described above can be produced by a process similar to that used in the above-described conventional technique except that the processing step of soldering the copper tab 31 to the silicon chip 17 and the lead wire 35 to the silicon chip 17, and also the processing step of soldering the assembly of the silicon chip 17 and the copper tab 31 to the interconnection conductor 13 are performed in a furnace while applying a proper pressure to the elements thereby forming the solder layers.
Thus, in this first embodiment, the application of the proper pressure during the soldering processes ensures that the thicknesses of solder Layers between the downward-protruding parts 33 and the interconnection conductor 13, between the upward-protruding part 34 and the silicon chip 17, and between the silicon chip 17 and the protrusion 38 fall within a small range from 0 to 5 \im, and also ensures that the thicknesses of the solder layers at the soldering portions E, F, and G fall within a small range from 50 pm to 55 pm which is equal to the sum of the former thickness of the solder layers and a thickness 50 Mm of the downward-protruding parts 33, the upward-protruding part 34 or the protrusion 38.
The former thicknesses of the solder layers become substantially zero if the above-described pressure is large enough. In this case, the thicknesses of the remaining parts of the solder layers become about 50 pm. If the pressure becomes lower, the variation in the thickness of the solder layers becomes greater than 5 urn and thus the thicknesses of the solder layers will be in the range from 50 to 55 [am.

In Figure 4, the curve X illustrates the life as a function of the thickness of the solder layer, obtained when the semiconductor device constructed in the above-described manner is subjected to the temperature cycle test from -40t to +160t, wherein the thickness of the solder layer is changed by changing the height h of the protrusion 38 formed on the circular truncated cone 37. The life is defined by the number of temperature cycles at which a crack finally appears at the soldering part G. The curve Y in Figure 4 is a plot of the gradient of the curve X {the ratio of the change in the life to the change in the thickness of the solder).
As represented by the curve X of Figure 4, the strain due to the stress induced in the solder layer by the heat cycles decreases and thus the life cycle increases with the increasing thickness of the solder layer. The life cycle reaches a saturated value when the thickness of the solder layer becomes about 70 |jm.
On the other hand, the curve Y increases with the thickness of the solder layer, and reaches a maximum value at a thickness of about 25 Mm and thereafter the curve Y decreases gradually. This means that it is desirable to increase the thickness of the solder layer at least up to about 25 |im because the life cycle increases at a greater ratio relative to the increasing ratio of the thickness of the solder layer until the thickness of the solder layer reaches 25 [im.
However, in the other hand, if the thickness of the solder layer is increased, the electric and thermal resistances also increase because the electric and thermal resistivities of the solder layer are cons.iderably greater

than those of the copper tab 31 and the silver lead wire 35. As a result, it becomes difficult to effectively transfer the heat generated in the silicon chip 17 to other parts, for example the copper tab 31. From this viewpoint, the thickness of the solder layer should not be too large.

Therefore, it is desirable that the thickness of the solder layer be greater than 25 urn although the electrical and thermal resistances increase to a certain extent. However, if the thickness of the solder layer is increased beyond 70 |im, the electrical and thermal resistances become too large while the life cycle is saturated. Thus, from the overall viewpoint including the thermal and electrical resistances, it is desirable that the thickness of the solder layer be in the range from 25 (im to 70 pm.
As described above, when soldering between the copper tab 31 and the silicon chip 17, between the silicon chip 17 and the lead wire 35, and between the copper tab 31 and the interconnection conductor 13, is performed, solders are fused while applying a pressure to the elements so that these elements are pressed against each other. Therefore, if the height h of each protruding part
33, 34, and 38 is set to a proper value in the range from 25 pm to 70 pm, then the solder layer disposed between the downward-protruding parts 33, the upward-protruding part
34, or the protrusion 38 and the corresponding element has a thickness near zero. On the other hand, if the height h of each protruding part is set to a proper value in the range 25 \xm to 65 pm, it is possible to have a thickness of the solder layer in the range from 0 to 5 |jm.
Furthermore, if it is desirable to ease the requirements of thickness uniformity of the solder layers to a wider range of 0 to 15 Mm- the height of each protruding part should be set to a proper value in the range from 25 [im to 55 Mm.
As described above, by setting the thickness of

the solder layers to a proper value, it is possible to expand the life of the semiconductor device to a desired value without having cracks in soldering parts E, F, and G in the peripheral regions of solder layers.
Thus, in this first embodiment, the thicknesses of the first solder layer 39 disposed between the copper tab 31 and the interconnection conductor 13, the second solder layer 40 disposed between the copper tab 31 and the silicon chip 17, and the third solder layer 41 disposed between the silicon chip 17 and the lead wire 35 are each set to a value greater than 25 pm, so that the shearing strain induced in the solder layers during the heat cycles can be reduced thereby suppressing the generation of cracks and thus improving the reliability of the device.
Furthermore, the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are set to a value in the range from 25 pm to 70 Mm so that not only the shearing strain in the solder layers arising during the heat cycles is reduced and thus the generation of cracks is suppressed, but also the increases in the electrical and thermal resistances of the solder layers are suppressed. As a result, the reliability and electric characteristics of the semiconductor device are improved.
Furthermore, the upward-protruding part 34 and the protrusion 38 are formed on the copper tab 31 and the lead wire 35, respectively, at locations opposite to the plate electrodes of the silicon chip 17, and the downward-protruding parts 33 are formed on the copper tab 31 at locations opposite to the interconnection conductor 13, thereby ensuring that the thicknesses of the first solder

layer 39, the second solder layer 40, and the third solder layer 41 are easily controlled to desired values.
The heights of the downward-protruding parts 33, the upward-protruding part 34, and the protrusion 38 are each set to a value greater than 25 \im thereby ensuring that the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are easily controlled to a desired value greater than 25 urn.
Furthermore, the heights of the downward-protruding parts 33, the upward-protruding part 34, and the protrusion 38 are each set to a value in the range from 25 \iw. to 70 Vim thereby ensuring that the thicknesses of the first solder layer 39, the second solder layer 40, and the third solder layer 41 are easily controlled to a desired value in the range from 25 Mm to 70 urn.
An end portion of the silver wire 36 of the lead wire 35 is expanded into the shape of a circular truncated cone thereby forming the circular truncated cone 37 and thus expanding the soldering area between the lead wire and the plate electrode of the silicon chip 17. As a result, the strength of soldering is increased, and the reliability of the device is improved. Furthermore, this technique prevents generation of cracks in the solder layers even when materials having great differences in the coefficients of linear expansion are employed.
Furthermore, the reinforcing solder layer 42 is disposed around the third solder layer 41 and the circular truncated cone 37 so as to increase the soldering strength between the silicon chip 17 and the lead wire 35. As a result, the reliability of the semiconductor device is enhanced. Furthermore, it is also possible to prevent

getieration of cracks in the solder layer even when materials having great differences in the coefficients of linear expansion are employed.
Furthermore, the upward-protruding part 34 is formed on the upper surface of the main part 32 of the copper tab 31, the protrusion 38 is formed on the end face of the circular truncated cone 37 of the lead wire 35, a solder material is disposed between the upper surface of the main part 32 of the tab and the plate electrode on the lower surface of the silicon chip 17, a solder material is also disposed between the plate electrode on the upper surface of the silicon chip 17 and the lower face of the circular truncated cone 37 of the lead wire 35, and then those solder materials are fused while applying a proper pressure to the elements so that both the copper tab 31 and the lead wire 35 are pressed against the silicon chip 17. Afterward, the solder materials are solidified thereby forming the solder layers having a thickness greater than 25 yinv. As s result, the shearing strain in the solder layers arising during the heat cycles is reduced and thus generation of cracks is suppressed. Therefore, it is possible to obtain a semiconductor device having high reliability. Furthermore, the downward-protruding parts 33 are formed on the main part 32 of the copper tab 31, and the main part 32 of the tab is placed at a predetermined location on the circuit substrate 12 via a solder material, and thereafter the solder material is fused while applying a proper pressure to the elements. Then the solder material is solidified so that a solder layer having a thickness greater than 25 |im is obtained. As a result, the shearing strain in the solder layers

arising during the heat cycles is reduced and thus generation of cracks is suppressed. Thus, a semiconductor device having high reliability can be obtained.
Furthermore, if the process is control led so that the thickness of the above-described solder layer falls within the range from 25 Mm to 70 Mm, then not only the shearing strain in the solder layers arising during the heat cycles is reduced and thus the generation of cracks is suppressed, but also the increases in the electrical and thermal resistances of the solder layer are suppressed. As a result, a semiconductor device having high reliability and excellent electric characteristics can be obtained.
EMBODIMENT 2
Figures 5A and 5B are a plan view and a side view, respectively, illustrating an end portion of a lead wire of a semiconductor device according to a second embodiment of the present invention. The lead wire 51 serving as the single conducting wire has three small and circular protrusions 52 having a height of 50 Mn and a diameter of 130 Mm protruding from a central portion of the surface, opposite to the silicon chip 17, of the circular truncated cone 37 wherein the three protrusions 52 are integral with the circular truncated cone 37 and located so that each protrusion 52 is inscribed in a circle having a diameter d2 of 400 Mm as shown in Figure 5A, Because the diameter of each protrusions 52 is small, it is easy to form these protrusions 52 so that they have a large protruding height.

EMBODIMENT 3
Figures 6A and 6B are a plan view and a side view, respectively, illustrating an end portion of a lead wire of a semiconductor device according to a third embodiment of the present invention.
A lead wire 61 has a protrusion 62 with a spherical surface protruding from a central part of a circular truncated cone 37 wherein the protrusion 62 is formed as an integral element of the circular truncated cone 37. The protrusion 62 has a diameter d2 of 400 pm and a height h of 50 ixm. As can be readily understood, this third embodiment also has advantages similar to those of the previous embodiments.
In the first embodiment described above, the protrusion 38 serving as the protruding part of the invention is formed on the circular truncated cone 37 of the lead wire 35. Alternatively, the protrusion 38 may also be formed on the plate electrode of the silicon chip 17. Furthermore, a protrusion may formed on both the circular truncated cone and the plate electrode so that the sum of the protruding heights of both protrusions and the thickness of solder disposed between these protrusions falls within the range from 25 jim to 70 urn.
Although the copper tab 31 is employed as the intervening element in the first embodiment described above, the semiconductor chip may be directly soldered to the interconnection conductor 13 without using the copper tab 31.
In the first embodiment described above, the downward-protruding parts 33 serving as the first protruding parts are formed on the main part 32 of the

intervening element, and the upward-protruding part 34 serving as the second protruding part is formed on the intervening element. Alternatively, these protruding parts may also be formed on the interconnection conductor 13 and the plate electrode (not shown) disposed on the lower surface of the semiconductor chip 17, respectively. Furthermore, protruding parts may also be formed on both the interconnection conductor 13 and the lower surface of the copper tab 32 thereby forming the first protruding parts, or otherwise protruding parts may also be formed on both the upper surface of the copper tab 32 and the electrode disposed on the lower surface of the semiconductor chip 17 thereby forming the second protruding parts, so that the sum of the protruding heights of both the first and second protruding parts and the thickness of solder disposed between these protruding parts falls within the range greater than 25 prn or within the range from 25 \xm to 70 [im.
The term "electric conductor" is used here as a generic expression to broadly denote electric conductors such as the interconnection conductor 13, the main part 32 of the tab serving as the intervening element, the lead wires 35 and 51, and the lead conductor 61. Furthermore, "the opposing electric conductor part" also includes a part of the electric conductor opposite to the corresponding element. Furthermore, the term "protruding part" is used here to broadly denote protruding parts such as the upward-protruding part 34, the protrusion 38, the small protrusions 52, and the protruding part 63 with a spherical surface . The term "solder layer" also includes the second and third solder layers.

In each embodiments described above, a silicon chip 17 is served as the semiconductor chip. Alternatively, a germanium chip and other element, that is the power transistor 306, may be served as the semiconductor chip.
The solder materials for the solder layers and the material for the single lead wire are not limited to those descried in the above embodiments. Various materials may also be employed without departing from the spirit and scope of the present invention.
Furthermore, the present invention is not limited to the semiconductor device designed to act as a controller for controlling an AC generator used in a car, and the present invention is also applicable to various semiconductor devices.

WE CLAIM:
1. A semiconductor device comprising; an interconnection conductor formed on a circuit substrate; an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side, said first surface being connected to said interconnection conductor via a first solder layer, and a semiconductor chip, said semiconductor chip being connected to the second surface of said intervening element via a second solder layer so that said intervening element absorbs the heat generated in said semiconductor chip; said semiconductor device being characterized in that said semiconductor device comprises at least either a first protruding part or a second protruding part, said first protruding part being formed at least either on said interconnection conductor or on the first surface of said intervening element, said first protruding part having a predetermined protruding height, said first protruding part being located at a position opposite to a corresponding element or a plurality of first protruding parte being located at positions opposite to each other so that said first solder layer has a thickness greater than 25 µm, said second protruding part being formed at least either on the second surface of said intervening element or on said semiconductor chip, said second protruding part having a predetermined protruding height, said second protruding part being located at a position opposite to a corresponding element or a plurality of second protruding parts being located at positions opposite to each other so that said solder layer has a thickness greater than 25 µm.

2. The semiconductor device according to claim 1, wherein the protruding height of said first and/or second protruding part is greater than 25µm.
3. The semiconductor device according to claim 1 wherein the thickness of said first and/or second solder layer is in the range µm 25µm to 70 µm.
4. The semiconductor device according to claim 3, wherein the protruding height of said first and/or second protruding part is in the range µm 25 µm to 70 µm.
5. The semiconductor device according to any one of the claims 1 to 4, wherein said intervening element is made of copper or a copper-based alloy, and said semiconductor chip is a silicon chip.
6. A method of producing a semiconductor device according to claim 1, comprising the steps of placing an electrically conductive intervening element having a first surface on its one side and a second surface on the opposite side for absorbing the heat generated in a semiconductor chip between said semiconductor chip and an interconnection conductor formed on a circuit substrate; connecting the first surface of said intervening element to said interconnection conductor via a first solder layer; and connecting the second surface of said intervening element to said semiconductor chip via a second solder layer; said method being

characterized in that said method further comprising at least either the step (a) described below or the step (b) described below:
(a) forming a first protruding part at least either on said interconnection conductor or on the first surface of said intervening element; placing said intervening element so that said first protruding part is located opposite to the corresponding element or the other first protruding part; placing a solder material between said interconnection conductor and said intervening element, fusing said solder material while applying a predetermined pressure so that said first protruding part and the corresponding element or the other first protruding part are pressed against each other, and then solidifying said solder material; thereby forming said first solder layer having a thickness greater than 25µm.
(b) forming a second protruding part at least either on the second surface of said intervening element or on said semiconductor chip; placing said semiconductor chip so that said second protruding part is located opposite to the corresponding element or the other second protruding part; placing a solder material between said intervening element and said semiconductor chip; fusing said solder material while applying a predetermined pressure so that said second protruding part and the corresponding element or the other second protruding part are pressed against each other; and then solidifying said solder material; thereby forming said second solder layer having a thickness greater than 25 µm.

7. The method according to claim 6, wherein the thickness of said first
and/or second solder layer is formed in the range from 25 µm to 70 µm in the step (a)
and/or or the step (b).
8. A semiconductor device, substantially as herein described, with
reference to figures 1 to 6B of the accompanying drawings.
9. A method of producing a semiconductor device, substantially as herein
described, with reference to figures 1 to 6B of the accompanying drawings.

Documents:

312-mas-2002 abstract dublicate.pdf

312-mas-2002 abstract.pdf

312-mas-2002 claims dublicate.pdf

312-mas-2002 claims.pdf

312-mas-2002 correspondence others.pdf

312-mas-2002 correspondence po.pdf

312-mas-2002 description (complete) dublicate.pdf

312-mas-2002 description (complete).pdf

312-mas-2002 drawings dublicate.pdf

312-mas-2002 drawings.pdf

312-mas-2002 form-1.pdf

312-mas-2002 form-19.pdf

312-mas-2002 form-26.pdf

312-mas-2002 form-3.pdf

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Patent Number

199050

Indian Patent Application Number

312/MAS/2002

PG Journal Number

23/2006

Publication Date

09-Jun-2006

Grant Date

28-Feb-2006

Date of Filing

23-Apr-2002

Name of Patentee

MITSUBISHI DENKI KABUSHIKI KAISHA

Applicant Address

2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO 100

Inventors:

#	Inventor's Name	Inventor's Address
1	KYOKU KURUSU	C/O MITSUBISHI DENKI KABUSHIKI KAISHA HEMEJI SEISAKUSHO, 840 CHIYODA-CHO, HIMEJI-SHI, HYOGO 670
2	KATSUMI ADACHI	C/O MITSUBISHI DENKI KABUSHIKI KAISHA HEMEJI SEISAKUSHO, 840 CHIYODA-CHO, HIMEJI-SHI, HYOGO 670

PCT International Classification Number

H01L23/48

PCT International Application Number

N/A

PCT International Filing date

PCT Conventions:

#	PCT Application Number	Date of Convention	Priority Country
1			NA