Title of Invention

A DEVICE FOR REDUCING THE EXITING CURRENT DRAW BY A MAGNETISING WINDING

Abstract A device for reducing the exciting current drawn by a magnetising winding of the single core or two core type comprising a compensating winding, one end of the primary of said winding being connected to an output terminal of an a.c source; an i-to-v converter, to the input terminal of Which the other end. of the primary is connected* the reference (ground) of the said converter being tied to the other output terminal of the said source; a second converter of the v-to-i type, to the input terminal of which the output terminal of the first converter is connected, the output terminal of the second converter being connected to one end of the compensating winding, the reference (groUnd) of the second converter and the other end of the compensating winding being tied to the said other output terminal of the said source; and a feed back compensation circuit provided for the winding of the single-core as well as the two core type.
Full Text This invention relates to a device for reducing the exciting current drawn by a magnetising winding.
The problem of reducing the exciting current drawn by a winding for establishing flux in a magnetic core has been receiving considerable attention over the years.
Reduced excitation current leads to better performance of inductive ratio devices. Conventionally, quality materials of high permeability and low loss have been employed for this purpose. "Two-stage principle" has also been employed along with buffer amplifiers for increasing the input impedance, especially of inductive voltage dividers (IVDs).
The device, according to this invention, for reducing
the exciting current drawn by a magnetising winding of the single core or two-core type comprises a compensating winding, one end of the primary of said winding being connected to an output terminal of an
the other output terminal of the said source; a second converter of the v-to-i type, to the input terminal of which the L output terminal of the first converter is connected, the output terminal of the second converter being connected to one end of the compensating winding, the reference (ground) of the second converter and the other end of the compensating winding being tied to the said other output terminal of the said source; and a feed back compensation circuit provided for the winding of the single-core as well as the two—core type.
This invention will now be described in further detail
by reference to the accompanying drawings which
illustrate by way of example embodiments of the device
proposed herein,
Fig.l illustrating the embodiment in a single-core configuration
Fig.2 illustrating the embodiment in a two-core arrangement with feed back compensation
and

Figs. 3(a) and 3(b) respectively illustrating wave forms of induced emf and exciting current without compensation and with compensation (exciting current magnified 50 times) for the single core type bf configuration.
In addition to the usual primary (Nl turns) and secondary (N 2 turns), the single core magnetic circuit now has a compensating winding of Nc turns.
One end, PI of the primary, is connected to an a.c. source S while the other end P2 goes to the input terminal of an i-to-v converter exemplified by the opamp 0A1. The reference (ground) of 0A1 is tied to the free end of the source S. The output of 0A1 is connected to the input of opamp 0A2 which feeds the compensating winding.
Assuming the opamps to be ideal, the output of
0A1, namely, I Riv which forms the input of 0A2 would
e be zero. Since Riv is finite, I would reduce to zero.
e In other words, 0A2 would provide a suitable current
through the compensating winding so as to make I
e zero.

The winding P1P2 is thus relieved of the task of having
to carry the exciting current. In such a case the
applied voltage to the primary V would be equal to the
1 induced emf e, . Hence the secondary induced emf will
be e = v N2 resulting in a perfect voltage 2 1 N1
transformation. In practice however, the gain of 0A2 should be finite to have a stable feedback system. It can be shown that the exciting current drawn by the

where Gvi is the transconductance of 0A2 which operates
as a v-to-i converter. The factor Nc
— Riv Bvi Nl
is nothing but the loop gain of the feedback system of
Fig.l. The device proposed herein takes the form of Fig.2 for the two stage case. The current drawn by the P1P2 winding which is normally low because of the two stage arrangement, gets further reduced by the addition of the i-to-v converter and associated feedback.

f
The device proposed herein can readily be used for constructing interposing voltage transformers of electronic energy meter circuits. High input impedance multi-decade inductive voltage dividers can be fabricated using the said device of the two stage arrangement. With the negative pin of the opamp 0A1 at virtual ground, the primary applied voltage across P1P2 could be quite large. The said device can therefore be used for constructing high accuracy high voltage reference PTs also.
It may be noted here that the waveform of the secondary emf would be an exact reproduction of the source voltage. If the latter is sinusoidal, then it nicely turns out that the flux in the core gets forced to become sinusoidal in wave shape. Hence the feed back arrangement can also be employed in a.c. magnetic testing.
To check the workability of the device proposed herein, tests were conducted on toroidal as well as E-I/E core specimens for the single core case of Fig.l and on a toroidal snecimen for two*stage operation. Reduction

by a -factor of nearly 100 was observed -for the single-core prototype. The two stage arrangement provided a reduction of 25 without compensation and the reduction
factor with compensation was 750. An input impedance
7 of 10 ohms was easily obtained in the two-stage
arrangement, without any precautions like guarding,
shielding etc.
The terms and expressions herein are of description and not of limitation, there being no intention to exclude any equivalents of the features illustrated and described, but it is understood that various other features of the device proposed herein are possible without departing from the scope and ambit of this invention.


We Claim:
i.A device for reducing the exciting current drawn by a magnetising winding of the single core or two core type comprising a compensating winding, one end of the primary of said winding being connected to an output terminal of an a.c source; an i-to-v converter, to the input terminal of which the other end of the primary is connected, the reference (ground) of the said converter being tied to the other output terminal of the said source; a second converter of the v-to-i type, to the input terminal of which the ' output terminal of the first converter is connected, the output terminal of the second converter being connected to one end of the compensating winding, the reference (ground) of the second converter and the other end of the compensating winding being tied to the said other output terminal of the said source; and a feed back compensation circuit provided for the winding of the single-core as well as the two core type.
2.A device for reducing the exciting current drawn by a magnetising winding substantially as herein described

with reference to, and as illustrated by, the accompanying drawings.

Documents:

0522-mas-1997 abstract.pdf

0522-mas-1997 claims-duplicate.pdf

0522-mas-1997 claims.pdf

0522-mas-1997 correspondence-others.pdf

0522-mas-1997 correspondence-po.pdf

0522-mas-1997 description (complete)-duplicate.pdf

0522-mas-1997 description (complete).pdf

0522-mas-1997 drawings-duplicate.pdf

0522-mas-1997 drawings.pdf

0522-mas-1997 form-1.pdf

0522-mas-1997 form-26.pdf


Patent Number 198263
Indian Patent Application Number 522/MAS/1997
PG Journal Number 30/2009
Publication Date 24-Jul-2009
Grant Date
Date of Filing 13-Mar-1997
Name of Patentee INDIAN INSTITUTE OF TECHNOLOGY
Applicant Address IIT P.O., MADRAS 600 036
Inventors:
# Inventor's Name Inventor's Address
1 DR. VARADARAJAN JAGADEESH KUMAR INDIAN INSTITUTE OF TECHNOLOGY IIT P.O., MADRAS 600 036
2 PROF. PANCHAPAGESAN SANKARAN INDIAN INSTITUTE OF TECHNOLOGY IIT P.O., MADRAS 600 036
PCT International Classification Number H02J4/00
PCT International Application Number N/A
PCT International Filing date
PCT Conventions:
# PCT Application Number Date of Convention Priority Country
1 NA