Title of Invention

A VIDEO SIGNAL VIEWING APPARATUS AND A USER COMMAND CONTROLLED APPARATUS RECEIVING A VIDEO SIGNAL

Abstract

ABSTRACT OF THE INVENTION Allows a video broadcast viewer to pause at anytime while a program, and upon retiming to be able to view the intervening segment. The video received during the pause period is stored and available for recall upon user command. The storage medium is oracular in so much that the memory, upon becoming filled to capacity continues to write incoming infomfiation data over the previously stored data. The storage circuits employs a sequential access storage device and/or a direct access storage device. The storage circuit has a high speed memory input buffer and a high speed memory output buffer to account for the relatively long READ and WRITE access times of the storage device employed. At the end of the pause period, the user can view the stored video. The user has a choice between catching up to the regular broadcast or watching the refraining program video in a delay mode. The stored video may be viewed intermittently or continuously in regular, slow or fast motion, under user direct or remote VCR-type of video function control.

Full Text

INTERRUPTION TOLFRANT VIDEO PROGRAM VIEWING HELD OF THE INVENTION The present Invention is directed to the field of video monitoring, storage and playback. It Is more particularly directed to concurrent storage of a video signal being received and display of a previously stored signal. BACKGROUND OF THE INVENTION It Is a constant endeavor to find ways of evincing a user's ability to satisfy personal priorities while viewing a transmitted video program. It Is quite usual for a user to be interacted to satisfy a higher priority requirement while viewing a desired program. The intonation cowl be a phone call received during a broadcast video program being transmitted in a time continuum. This type of viewing interference, although of relatively short duration, would here-to-fore cause a loss of the program portion transmitted for the duration of the intenuption. This may occur several times during a long program or movie with significant loss of program continuity and the disruption in received Information and/or entertainment. Control over the transmission and receding of TV systems, has historically exercised by the broadcaster of the system. Thus, pausing for higher priority events has not been generally feasible. In video on demand systems, bandwidth source and switch limitations today impede video on demand vet respect to limitless incremental Internals. It Is therefore an object of the present Invention to provide an apparatus to provide a user with a means for commanding a portion of a video program broadcast or other transmission In progress to be stored, and the agility to recall for viewing that stored portion at the user's convenience. The stored video may be viewed intennlttently or continuously in regular, slow or fast motion, under the user's direct or remote VCR-type of video function contra. It Is another bowed of the present invention to proofed the user with a method and apparatus to catch up with the regular broadcast and/or other transmission d that program. it is still another boned of the present invention to the user full VCR type contras for that portion of the program that is In storage. These controls Induce play, rewind, fast aim slow fonwards, pause, continue, screen splitting frame skipping, and padre in padre. It is still another of the present invention to the user the ability to review an immediately previously broadcast portion of a program being viewed. in one embodiment of the invention, a video signal viewing apparatus has a user command drcult, a receiver drcult coupled to the command drcult, and a display means coupled to the receiver drcult The apparatus induces an Input buffer drcult for receiving and buffering the signal portion of interest; a memory drcult coupled to the output of the Input buffer for storing the signsd portion; and an output buffer drcult coupled to the memory drcult for receiving and buffering the memory output. The command drcult causes the output of the output buffer to be coupled to the receiver druid for display on the display means upon reading a command from the user. It Is preferable that the apparatus memory drcult induces at least one dried access storage device (DASD), or at least one sequential access storage device (SASD) or a combination of these. It is desirable lOR the memory circuit to be of a circular type men upon becoming filled to capacity continues to write Incoming information data over the previously stored data. In one embodiment of the present invention the user has an interruption for a duration during which an amount of video data is transmitted. It Is desirable that the memory circuit have a capacity at least to the amount of video data transmitted in that duration. In one embodiment of the present Invention the wed signal comprises an entire program's wed signal content and the signal portion includes up to and including the entire program's video signal content. in still another aspect of the present Invention an apparatus is displayed at the end of the interruption; and feeding the portion to the display upon receiving the command. It is desirable that the step of coupling further comprises the steps of input buffering and feeding the portion to a memory circuit and the step of feeding be preceded by a step of output buffering. Still another aspect of the present invention is a device which has means to receive and display a video signal. The device includes at least one direct access storage medium; an input buffer coupled to the medium; an output buffer coupled to the medium; a storage hierarchy for storing a portion of the video signal in the medium and buffers; a means for routing the portion stored to the display; and a means for controlling the display. The means for controlling the display includes the functions of display pause; continue; normal, slow and fast playback; rewind; selective picture; frame skipping and picture in picture format. Accordingly, the present invention provides a video signal viewing apparatus having a receiver circuit, a user command circuit coupled to said receiver circuit, and a display means coupled to said receiver circuit, said apparatus further comprising an input buffer circuit coupled to said receiver circuit and having an input for receiving and buffering a portion of a signal, and an input buffer output; a memory circuit coupled to said input buffer output for storing said portion, and having a memory output; and an output buffer circuit having an output buffer input coupled to said memory output for receiving and buffering said memory output, and an output buffer output; and wherein said command circuit causes said output buffer output to be coupled to said receiver circuit for feeding said portion for display on said display means upon receiving a command from a user input. The present invention also provides a user command controlled apparatus receiving a video signal comprising a video input circuit for receiving said video signal and having a video output; a receiving circuit having a first receiver input coupled to said video output for receiving said video signal, a second receiver input and a receiver output; a display means having a display input coupled to said receiver output for receiving and displaying said video signal; a storage circuit having a storage input coupled to said video output, and a storage output, said storage circuit receiving and storing a portion of said video signal; and a control circuit responsive to a user command coupled to said storage circuit and causing said storage output to be coupled to said second receiver input for feeding said portion for display on said display means when so commanded by a user. These and other objects, features and advantages of the present invention will become apparent upon further consideration of the following detailed description of the invention when read in conjunction with the drawing figures, in which : Figure 1 shows an embodiment of the present invention. Figure 2 shows an algorithm used by the present invention when the user is ready to again view the display Figure 3 shows the addition of a sequential access storage device to the memory circuit of the present invention. Figure 4 shows the long-memory-display algorithm of the present invention. Figure 5 shows an embodiment of the present invention when video transmission is received from u . 1 telephone line. DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method and apparatus to enable interruption tolerant video program viewing. The method and apparatus of the present invention are advantageous in receiving standard broadcast TV transmissions, cable-TV transmissions, and/or public or private continuous transmission of a program. A feature of the invention is a storage hierarchy that includes at least one direct access, non-sequential, storage medium jading with algorithms employing data buffers. The techniques are employable for both an dog and/'or digital video transmissions. In one embodiment, the user's video receiver and display is provided wth an apparatus which has a user command drcuit. It allows the user, upon being interrupted, to command the video broadcast display to be paused, and to initiate storage of the subsequent portion of the video in progress for the duration of interruption. Upon retiming, the user Is able to command that tile stored portion be displayed. The display can be adapted to allow tile user to catch up to time regular broadcast, or continue to watch the video In delay mode. The stored video may be wowed intennittentiy or continuously in regular, slow or fast motion, under the user's direct or remote VOR-type of video function control. The apparatus Includes an Input buffer circuit for buffering the video received during the interruption for proper feeding into a memory dice. Upon user command, the stored video is fed out from the memory den’s to the display. The apparatus sods includes an output buffer circuit to act as a buffer between the oaf the memory device and the display. Input and output buffering with high speed READ / WRITE capable circuitry is required because of the relatively slow READ / WRITE access times of the moderate capacity storage devices. The buffering is generally accomplished using a high speed silicon memory device. The amount of buffer memory required depends upon the efficiency of the READ/ WRITE algorithms employed, as known to tiwse skilled in ttie art. It is desirable that the storage device have a capacity at least equal to the amount of video data transmitted for the predetermined maximum duration of a serviceable interrupt. In one embodiment of the present invention the video signed comprises an entire program's video signal content and the signal portion includes up to and including the entire program's video signal content. For this situation, the afaratus memory generally includes at least one direct access storage device, and at least one sequential access storage device. The sequential access storage device has a very large memory capacity„but also has a relatively long access time for READ and WRITE. The direct access storage device would desirably be able to provide both input and output buffering for the sequential access storage device. In one embodiment of the present invention the apparatus the stored video on a portion of the display, within the full display showing of the picture of the program in progress, or vice versa. Split screen may be used to show the picture from the stored video one side of the display area, and the picture of the program in progress on the other side of the display area. Selective picture allows the user to select which picture to display at a panicle moment, the stored video or the picture of the program in progress. The user may switch from one to the other according to the user's desire. The present invention ‘so provides a method for enfolding a video program user being interrupted while viewing a video signal on a display. The method enables storage of the portion of the video signal transmitting during the duration of the interruption and subsequent viewing. The method of pausing the display, coupling the subsequently received to a storage medium, storing it in the storage medium, responding to a command to display the portion, and feeding the portion to the display. It is desirable that the step of coupling includes the step of input buffering, and the step of feeding, be preceded by a step of output buffering. An embodiment of the present Invention is shown in Arguer 1. Figure 1 shows an external transmitter means 100 white transmits the user selected video program. In normal receive mode, the tuning and demodulating circuit 102 routes the selected, received, and digitized transmission to a receiver circuit 104 which feeds the display means 106. In a simple form this constitutes and operates in accordance with a standard digital TV receiver. A control circuit 108 enables a user to PAUSE the display and cause the digital video to be fed to an Input buffer circuit 110, within storage circuit 109. The input buffer circuit 110 Is a dual port video buffer which simultaneously accepts the video transmissions and feeds It to a memory circuit 112 for storage. A memory circuit 112, within storage circuit 109, includes at least one direct access storage device (DASD) 111. Upon user command the control circuit 108 causes the memory drcuit 112 to feed the stored video to be fed to an output buffer circuit 114 within storage dart 109. The output buffer drcuit 114 sends the video signal to the receiver drcuit 104 for delay on the display means 106. User command is normally transmitted to the control drcuit 106 m a remote controller 116. The transmitting drcuit 100, tuning and demodulating drcuit 102, receiving drcuit 104, remote control drcuit 116 and display means 106 may all be identical to those used in standard TV reception. In actuality the Input buffer drcuit 110 and the output buffer drcuit 114 are in themselves temporary memory devices spurting the memory drcuit 112. If the tuning and demodulating drcuit 102 output is In analog video, an analog wed to digital video converter 103 is used to form digitized video prior to its being fed to the input buffer 110. In addition, he output video from the output buffer drcuit 114 is fed to digital video to analog video converter 105 to form an analog video signal prior to its being fed to the receiving drcuit 104. It is desirable for the memory drcuit to be of a oracular type, which upon becoming filled to cupidity continues to write incoming Information data over the previously stored data. Thus if the memory cupidity is for 15 minutes of video data, the data received in the 16th minute overwrites the locations holding the data received during the first minute, and so on. In this way, once the memory is filled with 15 minutes of video, new data continues to be stored by overwriting the older video. Thus, the memory always contains the video corresponding to the last 15 minutes. In one embodiment, upon receiving an interrupt, a user issues a DISPLAY PAUSE command which initiates the pause algorithm. The pause algorithm starts wth the signed being fed to the input buffer circuit 110 and stored In the memory circuit 112, preferably a DASD 111. The DASD 111 becomes occupied with the subsequent data In that it is dual port, the buffer simultaneously receives subsequent digitized video signal from the video source and outputs a delayed previous portion of that video sign’ to the memory drcuit 11Z This works satisfactorily as long as the memory cupidity is such as to accommodate the incoming video data for the duration of the intemjption. With current direct access storage devices, compression tediniques and input video rates, this condition is easily satisfied for intimations ranging from a few minutes to well over an hour. When the user is ready to resume watching again, the user issues a command to DISPLAY MEMORY, This Initiates the memory-display algorithm shown in Arguer 2. As shown in Figure 2, the input buffer drcuit 110 continues to receive and temporarily store the subsequent video data, and outputs its oldest stored data to the DASD 111. The DASD 111 WRITES the received video data into the next storage location, and outputs its previously stored video data In the sequence received, in a first-in first-out format. The output buffer drcuit 114 receives the DASD 111 output and feeds its earliest received video data to the receiving drcuit 104 for display on the display means 106. This memory-display algorithm ensures that new video data which is currently being transmitted is concurrently stored while the user views the stored video. This algorithm requires that during each cede both a READ and a WRITE of the storage device take place to each video buffer. This is most readily accomplished using a dual port buffer. In some cases it may be advaintageous to use a combination of two single port vile buffers as an alternative to the dual port buffer. With two single port buffers, at each cede one buffer is being filled with the input signal while the other is independently and simultaneously outputting its data to the storage device. Each buffer automates READ and WRITE operations, one READs the input video while the other WRITES its stored, video. Since both a READ and a WRITE of the storage device to each video buffer must be done during each cycle, the video buffer size needs to be approximately twice that required for the PAUSE sequence described above. Intelligent file data store and retrieval methods which allow for the mechanical constraints of the storage device, the travel distance and number of times required to access the device, can be used to optimize the durations of each READ and WRITE. An ultimate configuration, most applicant to situations of long duration interrupts and therefore requiring long periods of video storage, is shown in Arguer 3. Arguer 3 shows the addition of a sequential access storage device (SASD 113) to the memory circuit (112 of Figure 1). A SASD 113 has much larger storage Canady than a DASD 111. The SASD 113 could be funned using magnetic tape memory or preferably an optical disk with READ and WRITE capability. Although Sass’s presently have a relatively long access time, the DASD 111 provides more than sufficient input and output buffering to prevent information loss. Use of the SASD 113 requires an additional READ and WRITE of the DASD 111. Rest, a section of data which has been stored on the DASD 111 is archived to the SASD 113. Then the DASD 111 retrieves a section of data which has been archived on the SASD 113 for eventual display. With data rates of about 3 Mbytes/seconds for direct access storage devices, the video data stream must be compressed. In a modification of this embodiment the input buffer and output buffer have enough, usually silicon, memory to buffer the access times of the SASD. In this situation the SASD would just replace the DASD. This Is becoming more and more economically practical wth the development of optical disks with reduced access times, and the B of cheaper and more dense silicon type memory. Silicon devices are the memories of choice for the buffers. When available in the receiving apparatus, the SASD 113 is generally put to use when the user knows that an intemjption is gang to take a long time such that the required wed data storage is more than the capacity of the DASD 111. This is indicated by the user issuing a LONG PAUSE command. This initiates the long-pause algorithm which starts feeding the video sign’ to the input butter N, and activating both the DASD 111 and SASD 113 portions of the memory drcuit. For this description it is advantageous to initially consider the DASD 111 to be segmented Into a first portion and a second portion. The portions are most generally of equal capacity but egad has a minimum required capadty. The first portion's capadty must be greater than the amount of video data received in a time equal to the SASD's worst case WRITE access time. The second portion's capacity must be greater than the amount of video data received In a time equal to the SASD's worst case READ access time. The input buffer circuit 110 feeds the first portion of DASD 111 which sends its output to the SASD 113. At any instant, botii the DASD 111 and the SASD 113 have stored video infomiation. in tfiis embodiment, the leading and major portion of the stored video resides in the SASD 113 followed by that stored In titer first portion of DASD 111. The second portion is only called upon when the SASD 113 starts WRITING out. This occurs both at SASD overflow and in response to DISPLAY LONG femora command. When the user Is ready to resume watching again, the user Issues a command to DISPLAY LONG MEMORY Initiating the long-memory-display algoritfim shovwi in Figure 4. As shown In Figure 4, the Input buffer drcult 110 continues to recede and temporarily store the subsequent video data, and outputs Its oldest stored data to the first portion the DASD 111. The first portion DASD 111 WRITEs the received video data into its next storage location, and continues to output its previously stored video data In the sequence received to the SASD 113. The SASD 113 WRITEs its received video data into its next storage location, and continues to concun'ently output its portentously stored video data in the sequence received to the second portion of DASD 111. The second portion of DASD 111 WRITES the received video data into Its next storage location, and continues to concurrently output its previously stored video data in the sequence received to the output buffer drcuit 114. The output buffer drcuit 114 receives the DASD 111 output and outputs Its earliest received data to the receiving drcuit 104 for display on the display means 106. This long-memory-display algorithm also ensures that new video data which is currently being transmitted Is stored while the user views the stored video. An alternate embodiment of the long-pause rhythm has the first portion ot me second portion of DASD 111 prior to feeding the SASD 113. in this case, the leading part of the stored V\6eo resides in the second portion of DASD 111, followed by the part in the SASD 113, followed by the part in the first portion of DASD 111. This speeds up the long-memory-display algorithm by at least the READ access time of the SASD 113. in a desirable alternative the SASD Is automatically activated when the amount of video storage is abreacting the capacity of the DASD's memory. With this capability the apparatus changes from (grating Vn’ th the pause girths to operating vet the long algorithm. If this happens, when the user Is ready to resume watching again, the system automatically uses the long-memory-display algorithm shown In Rgure 4, Instead of the memory-defray algorithm shown in Figure 2. It Is noted that in the simplest foci the first and second portion of DASD 111 are easily implemented by using a separate DASD for each portion. However, a single DASD 111 can be used in coordination wth puppet input and output buffer sizes, in which the READ and WRITE cycles of each device are implemented intelligently such that the duration of each cycle, and so the amount of video data handled in each role, Is optimized for data transfer, without data loss or buffer overflow. It is desirable to give the user returning after an a choice of catching-up with the video program or viewing the remainder of the program with a fixed delay. The fixed delay would be equal to the duration of the intimation. Catching up vent the regular program transmission enables the user to use this intenuption scheme repeatedly for the entire capacity of the memory circuit 112. If the user does not wish to catch up to the real time transmission, as is likely in a technical lecture or in movies on demand, only the algorithm shown in Figure 2 is executed. If the user chooses to eventually catch up to the real time transmission as is highly likely in nominal TV transmission, catch-up may be accomplished In one of several ways. One way is to discard some video frames by employing frame skipping, such that one out of every so many frames of data are discarded consistent waif a discard rate. The frame discard rate may be user set or alternatively it may be automatically calculated from a user specified amount of time allowed to catch up to the regular programming. A second way to catch up with the regular video transmission, is to cut out from displaying or rush through the display of specific portions of the data which do not interest the user. This may include skipping commerdais in a manner Ilion to those sidled in the art. A third way is to play bacon( the stored video at faster than normal display rate. A fourth way is to simultaneously display the stored data together with the continuing video In different sections of the user's display. This can be by splitting the screen or in a way analogous to picture in picture (PIP). In an alternate embodiment, all received video transmissions of the user selected program are continuously fed simultaneously to both the receiving drcuit 104 and the input buffer drcuit 110. The user views the program fed through the receiver drcuit 104 on the display means 106 in normal fashion. The input buffer drcuit feeds the received video data to the memory drcuit 112 for storage. In this way the memory drcuit fills to its storage capadty of C’wg. bytes with the wed program. Memory storage operates in drcular mode and is Q'dic over C’’ bytes of video. Once it is filled to capadty each next cyde of received video data overwrites that of the previous cyde. Thus, any time after receiving the first C,’’ bytes of the video program, the memory has the immediately previous Caooge bytes of program data stored in the DASD 111 memory. At any time, the user can issue a DISPLAY MEMORY command to the control drcuit 108 causing the output buffer drcuit 114 to be fed to the receiving drcuit 104 for output to the display means. In this embodiment, the user need not pause the q)reation upon an interruption. Rather, the user only needs to command that the video being displayed should come from storage via the output butter 114 rather than directly from the tuning and demodulating drcuit 102. The user may view this in padres in picture mode. The video in progress may be shown on the full screen 115, with the stored video being shown on a portion of the saeen 107. This may also be viewed in split saeen with portion 107 representing a split screen. In seledive saeen either the video in progress or the stored video, in accordance with the user's selection, would be on the full saeen 115. Any catching-up circuit may be used with this embodiment. An estimate of the required amount of memory storage is obtained by considering that 2 l’bytes of digital data are transmitted each second for \4deo vyhich is not compressed. This corre’nds to 120 Mbytes/minute. Thus, 15 minutes of non-compressed wdeo requires 1.8 Gbytes of storage capacity. Compression schemes wll reduce the amount of storage needed by the particular compression ratio. For example, the MPEG-1 format for compressed audio and video is 1.5 Mbits/second, or 187.5 Kbytes/second. This would require less than 170 Mbytes of storage for 15 minutes of video, and only 675 Mbytes for an hour of MPEG-1 compressed video. In addition, longer videos may be stored either on multiple direct access storage devices or on a hierarchy invoMng both direct access storage dewces and sequential access storage devices such as optical disks and tape drives. For example, tape drives whose access times are in the order of seconds are now available. Thus a hierarchy involving a sequential access storage device along with a direct access storage device can store very long videos. The minimum size of the video irput buffer drcuit 110 may be estimated by noting that the buffer must be large enough to temporarily store the video data received during the largest access time of the storage device employeid in the memory circuit 112. A storage device with an access time of 15 msec requires a buffer of 230 Kbytes of data for non-conpressed video. Compression schemes would significantly reduce the size of the Input buffer drcuit 110. For practical compatibility with TV and direct access storage devices, it is best to choose a buffer size which is an integral multiple of the frame field and dose to the sector size of the storage device. The required buffer size, even for non-compressed video, is well within video buffers available presentiy. In cases where the video is received In compressed fomiat, the receiving drcuit Indudes a drcuit for decompression. It is desirable that the present invention allow memory play, rewnd, stop, continue and normal, fast and slow motion display. It Is preferable that these fundions are conti'dled by the user using a remote controller (116 in Figure 1 ). This is best employed in an embodiment wherein all transmission are continuously stored in the storage device, as opposed to previously only storing it when the user wishes to pause. The storage algorithm may be the same as described in the pause algorithm or the longfause algorithm. As with the previously described modalities, if the storage devices memory is not large enough to store the entire program transmission, eariier parts of the program are overwritten by the new transmission. When the user specifies how many frames or units of time to rewind, the position of this data on the direct access storage device is calculated and the algorithm for display-memory can be used as in Figure 2. The display may be commanded to occur in normal speed, slow motion, or faster than normal speed. The present invention is advantageous in many situations. These include home, library, educational or industrial environments where TV signals anive either by broadcast, cable, satellite or telephony. Rgure 5 shows a system implementing the present invention for a case where the input video is received from a T-1 telephone line 152, w’lch prowdes 1.544 MHz of analog baidwidth. When used for a digital signal, digital information is transmitted and received over a T-1 line using a modem. The digital data rate is commensurate with the bits/Hz capability of the modem enployed. The system in Rgure 5 uses a 1 bit/Hz modem connected to the T-1 line 152. The T-1 line 152 output is fed to a T-1 receive card 154, which buffers the subsequent video data. It is capable of receiving a video program compressed in MPEG-1, 1.5 Mbit/sec format. Until the system is paused by a user, the received wdeo Is fed directly to an MPEG-1 decompressor and decoder card 156. The video is then passed to a video card 158 and is displayed on the video display 160. When the user issues a DISPLAY PAUSE command the video is transferred to the disk memory 162 after a predetermined amount of video data is received in the T-1 receive card's 154 memory. The disk memory 162 is put into a circular mode such that if its memory capacity becomes filled, subsequent video continues to be received and starts to overwrite the oldest data in the disk. This continues until the user issues a DISPLAY MEMORY command. Upon the user's issuing the DISPLAY MEMORY command, the eariiest stored disk data is fed to the MPEG-1 decompressor and decoder card 156 from which it is fed for display on video display 160. If the duration of the pause is short, such that the disk memory is not filled when the user issues the DISPLAY MEMORY command, the disk continues to be filled while the display of the stored data commences. Each subsequent time the user issues a DISPLAY MEMORY command, the earliest stored disk data is displayed. The T-1 receive card 154, the MPEG-1 decompressor and decoder card 156, and the video card 158 are Inserted Into a personal computer (PC) 150, which has a disk memory 162, and is configured to operate as a digital TV receiver and display. The PC screen or an external monitor may be used as the video display 160. The personal computer has the operational algorithms pre-loaded and may serve as a complete medium for Implementing the present Invention. Standard VCR type functions are remotely user controlled with a remote controller 164. The controller usually employs infra red technology. The algorithms may be Implemented In software, hardware or in a combination of software and hardware. Thus, although the present Invention was described with particular embodiments in specific modalities, those familiar with the art realize that the concept and intent of the Invention may be employed in many other configurations not directly described herein. WE CLAIM : A video signal viewing apparatus having a receiver circuit, a user command circuit coupled to said receiver circuit and a display means coupled to said receiver circuit, said apparatus further comprising an input buffer circuit coupled to said receiver circuit and having an input for receiving and buffering a portion of a signal, and an input buffer output; a memory circuit coupled to said input buffer output for storing said portion, and having a memory output; and an output buffer circuit having an output buffer input coupled to said memory output for receiving and buffering said memory output, and an output buffer output; and wherein said command circuit causes said output buffer output to be coupled to said receiver circuit for feeding said portion for display on said display means upon receiving a command from a user input. The apparatus as claimed in claim 1, wherein said memory circuit has a device selected from the group consisting of at least one of a direct. access storage device; and a sequential access storage device. The apparatus as claimed in claim 1, wherein said input buffer circuit comprises an input coupling circuit for coupling said portion to said input for receiving; and a control circuit responsive to said user command circuit, coupled to said input coupling circuit, for causing said portion to be fed to said input for receiving when so commanded by said user. The apparatus as claimed in claim 1, wherein said user has an interruption, said interruption having a duration; and wherein said signal portion corresponds to an amount of video data transmitted during said duration. The apparatus as claimed in claim 4, wherein said memory circuit has a capacity at least equal to said amount of video data transmitted. The apparatus as claimed in claim 4, wherein said duration is 15 minutes. The apparatus as claimed in claim 4, wherein said amount of video data transmitted is 170 Mbytes. The apparatus as claimed in claim 1 further including a video signal which comprises an entire program's video signal content; and wherein said signal portion includes said entire program's video signal content. The apparatus as claimed in claim 1, wherein said command circuit comprises a video display function controller for controlling a function selected from a group consisting of at least one of: play, rewind, stop, still, continue, fast forward, and slow forward, selective picture, and picture in picture format. The apparatus as claimed in claim 9, wherein said controller is a remote controller. The apparatus as claimed in claim 1, wherein said memory circuit comprises a circular storage device. The apparatus as claimed in claim 1 further comprising a catchup circuit for said user to catch up with a video signal in progress. The apparatus as claimed in claim 12, wherein said catchup circuit provides catchup in a form selected from the group consisting of at least one of: picture in picture; frame skipping; and split screen. A user command controlled apparatus receiving a video signal comprising a video input circuit for receiving said video signal and having a video output; a receiving circuit having a first receiver input coupled to said video output for receiving said video signal, a second receiver input and a receiver output; a display means having a display input coupled to said receiver output for receiving and displaying said video signal; a storage circuit having a storage input coupled to said video output, and a storage output, said storage circuit receiving and storing a portion of said video signal; and a control circuit responsive to a user command coupled to said storage circuit and causing said storage output to be coupled to said second receiver input for feeding said portion for display on said display means when so commanded by a user. The apparatus as claimed in claim 14, wherein said storage circuit comprises an input buffer circuit for buffering said portion, forming said storage input and having an input buffer output; a memory circuit coupled to said input buffer output for performing said storing, and having a memory output; and an output buffer circuit for receiving and buffering said memory output, said output buffer circuit forming said storage output. The apparatus as claimed in claim 14, wherein said storage circuit has a memory element selected from the group of elements consisting’ of at least one of: an input buffer; a direct access storage device; a sequential access storage device; and an output buffer. The apparatus as claimed in claim 14, wherein said user having an interruption, said interruption having a duration; and wherein said signal portion corresponds to an amount of video data transmitted during said duration. The apparatus as claimed in claim 17, wherein said memory circuit has a capacity at least equal to said amount of video data transmitted. The apparatus as claimed in claim 17, wherein said duration is 15 minutes. The apparatus as claimed in claim 17, wherein said amount of video data transmitted is 170 Mbytes. The apparatus as claimed in claim 14, wherein said video signal comprises an entire program's video signal content; and wherein said signal portion includes said entire program's video signal content. The apparatus as claimed in claim 14, wherein said control circuit comprises a video display function controller for controlling a function selected from a group consisting of at least one of: play, rewind, stop, still, continue, fast forward, and slow forward, selective picture, and picture in picture format. The apparatus as claimed in claim 22, wherein said controller is a remote controller. The apparatus as claimed in claim 14, wherein said storage circuit comprises a circular storage device. An apparatus having a circuit to receive and display a video signal, comprising at least one circular storage medium; an input buffer coupled to said medium; an output buffer coupled to said medium; a storage hierarchy for storing a portion of said video signal in said medium and buffers; a circuit for feeding said portion stored to said display; and a circuit for controlling said display, said circuit for controlling includes a video display function controller for controlling a function selected from a group consisting of at least one of: play; still; stop; rewind; continue; slow forward; fast forward; selective picture; and picture in picture format. A video signal viewing apparatus substantially as herein described with reference to the accompanying drawings. A user command controlled apparatus receiving a video signal substantially as herein described with reference to the accompanying drawings.

Documents:

2035-mas-1996 abstract.pdf

2035-mas-1996 claims-duplicate.pdf

2035-mas-1996 claims.pdf

2035-mas-1996 correspondence-others.pdf

2035-mas-1996 correspondence-po.pdf

2035-mas-1996 description (complete)-duplicate.pdf

2035-mas-1996 description (complete).pdf

2035-mas-1996 drawings.pdf

2035-mas-1996 form-2.pdf

2035-mas-1996 form-26.pdf

2035-mas-1996 form-4.pdf

2035-mas-1996 form-6.pdf

2035-mas-1996 petition.pdf